X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fm32r%2Fmodelx.c;h=a17493ddb8b9a8b2e0f6bb00960480e0dc17cbcf;hb=60db1b8565060f4bd2287b060ea9724c93289982;hp=9fbbfcfa8658e2178e88eebcdc188df111dc5ab0;hpb=368fc7dba80399d03f2310a7288ab1690694fc80;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/m32r/modelx.c b/sim/m32r/modelx.c index 9fbbfcfa86..a17493ddb8 100644 --- a/sim/m32r/modelx.c +++ b/sim/m32r/modelx.c @@ -2,23 +2,22 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. -Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. +Copyright 1996-2020 Free Software Foundation, Inc. -This file is part of the GNU Simulators. +This file is part of the GNU simulators. -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. + This file is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3, or (at your option) + any later version. -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. + It is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY + or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public + License for more details. -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + You should have received a copy of the GNU General Public License along + with this program; if not, see . */ @@ -34,131 +33,26 @@ with this program; if not, write to the Free Software Foundation, Inc., /* Model handlers for each insn. */ -static int -model_m32rx_x_invalid (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_x_after (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_x_before (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_x_cti_chain (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_x_chain (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); - } - return cycles; -#undef FLD -} - -static int -model_m32rx_x_begin (SIM_CPU *current_cpu, void *sem_arg) -{ -#define FLD(f) abuf->fields.fmt_empty.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); - int cycles = 0; - { - int referenced = 0; - int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); - } - return cycles; -#undef FLD -} - static int model_m32rx_add (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); referenced |= 1 << 0; + referenced |= 1 << 1; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -167,20 +61,21 @@ model_m32rx_add (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_add3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add3.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add3.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -189,20 +84,23 @@ model_m32rx_add3 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_and (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); referenced |= 1 << 0; + referenced |= 1 << 1; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -211,20 +109,21 @@ model_m32rx_and (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_and3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_and3.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_and3.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -233,20 +132,23 @@ model_m32rx_and3 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_or (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); referenced |= 1 << 0; + referenced |= 1 << 1; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -255,20 +157,21 @@ model_m32rx_or (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_or3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_or3.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_and3.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -277,20 +180,23 @@ model_m32rx_or3 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_xor (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); referenced |= 1 << 0; + referenced |= 1 << 1; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -299,20 +205,21 @@ model_m32rx_xor (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_xor3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_and3.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_and3.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -321,20 +228,21 @@ model_m32rx_xor3 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_addi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addi.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_addi.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - dr = FLD (out_dr); - sr = FLD (in_dr); - referenced |= 1 << 0; + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); + referenced |= 1 << 1; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -343,20 +251,23 @@ model_m32rx_addi (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_addv (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addv.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); referenced |= 1 << 0; + referenced |= 1 << 1; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -365,20 +276,21 @@ model_m32rx_addv (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_addv3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addv3.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add3.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -387,20 +299,23 @@ model_m32rx_addv3 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_addx (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addx.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); referenced |= 1 << 0; + referenced |= 1 << 1; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -409,15 +324,16 @@ model_m32rx_addx (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_bc8 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_bl8.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; + INT in_sr = -1; if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } return cycles; #undef FLD @@ -426,15 +342,16 @@ model_m32rx_bc8 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_bc24 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bc24.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_bl24.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; + INT in_sr = -1; if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } return cycles; #undef FLD @@ -443,26 +360,27 @@ model_m32rx_bc24 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_beq (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beq.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_beq.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; + INT in_sr = -1; if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -471,24 +389,25 @@ model_m32rx_beq (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_beqz (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_beq.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; + INT in_sr = -1; if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src2 = FLD (in_src2); referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -497,24 +416,25 @@ model_m32rx_beqz (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_bgez (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_beq.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; + INT in_sr = -1; if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src2 = FLD (in_src2); referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -523,24 +443,25 @@ model_m32rx_bgez (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_bgtz (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_beq.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; + INT in_sr = -1; if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src2 = FLD (in_src2); referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -549,24 +470,25 @@ model_m32rx_bgtz (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_blez (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_beq.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; + INT in_sr = -1; if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src2 = FLD (in_src2); referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -575,24 +497,25 @@ model_m32rx_blez (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_bltz (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_beq.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; + INT in_sr = -1; if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src2 = FLD (in_src2); referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -601,24 +524,25 @@ model_m32rx_bltz (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_bnez (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beqz.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_beq.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; + INT in_sr = -1; if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src2 = FLD (in_src2); referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -627,15 +551,16 @@ model_m32rx_bnez (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_bl8 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bl8.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_bl8.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; + INT in_sr = -1; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } return cycles; #undef FLD @@ -644,15 +569,16 @@ model_m32rx_bl8 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_bl24 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bl24.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_bl24.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; + INT in_sr = -1; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } return cycles; #undef FLD @@ -661,15 +587,16 @@ model_m32rx_bl24 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_bcl8 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_bl8.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; + INT in_sr = -1; if (insn_referenced & (1 << 4)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } return cycles; #undef FLD @@ -678,15 +605,16 @@ model_m32rx_bcl8 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_bcl24 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bcl24.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_bl24.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; + INT in_sr = -1; if (insn_referenced & (1 << 4)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } return cycles; #undef FLD @@ -695,15 +623,16 @@ model_m32rx_bcl24 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_bnc8 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bc8.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_bl8.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; + INT in_sr = -1; if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } return cycles; #undef FLD @@ -712,15 +641,16 @@ model_m32rx_bnc8 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_bnc24 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bc24.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_bl24.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; + INT in_sr = -1; if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } return cycles; #undef FLD @@ -729,26 +659,27 @@ model_m32rx_bnc24 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_bne (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_beq.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_beq.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; + INT in_sr = -1; if (insn_referenced & (1 << 3)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 1, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 1, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -757,15 +688,16 @@ model_m32rx_bne (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_bra8 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bra8.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_bl8.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; + INT in_sr = -1; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } return cycles; #undef FLD @@ -774,15 +706,16 @@ model_m32rx_bra8 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_bra24 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bra24.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_bl24.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; + INT in_sr = -1; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } return cycles; #undef FLD @@ -791,15 +724,16 @@ model_m32rx_bra24 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_bncl8 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bcl8.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_bl8.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; + INT in_sr = -1; if (insn_referenced & (1 << 4)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } return cycles; #undef FLD @@ -808,15 +742,16 @@ model_m32rx_bncl8 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_bncl24 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_bcl24.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_bl24.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; + INT in_sr = -1; if (insn_referenced & (1 << 4)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } return cycles; #undef FLD @@ -825,19 +760,20 @@ model_m32rx_bncl24 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_cmp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmp.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_st_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -846,17 +782,18 @@ model_m32rx_cmp (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_cmpi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_st_d.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src2 = FLD (in_src2); referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -865,19 +802,20 @@ model_m32rx_cmpi (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_cmpu (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmp.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_st_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -886,17 +824,18 @@ model_m32rx_cmpu (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_cmpui (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpi.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_st_d.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src2 = FLD (in_src2); referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -905,19 +844,20 @@ model_m32rx_cmpui (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_cmpeq (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmp.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_st_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -926,17 +866,18 @@ model_m32rx_cmpeq (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_cmpz (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpz.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_st_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src2 = FLD (in_src2); referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -945,20 +886,23 @@ model_m32rx_cmpz (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_div (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_div.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); referenced |= 1 << 0; + if (insn_referenced & (1 << 0)) referenced |= 1 << 1; if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -967,20 +911,23 @@ model_m32rx_div (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_divu (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_div.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); referenced |= 1 << 0; + if (insn_referenced & (1 << 0)) referenced |= 1 << 1; if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -989,20 +936,23 @@ model_m32rx_divu (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_rem (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_div.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); referenced |= 1 << 0; + if (insn_referenced & (1 << 0)) referenced |= 1 << 1; if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1011,20 +961,23 @@ model_m32rx_rem (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_remu (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_div.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); referenced |= 1 << 0; + if (insn_referenced & (1 << 0)) referenced |= 1 << 1; if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1033,20 +986,23 @@ model_m32rx_remu (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_divh (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_div.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); referenced |= 1 << 0; + if (insn_referenced & (1 << 0)) referenced |= 1 << 1; if (insn_referenced & (1 << 2)) referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1055,17 +1011,18 @@ model_m32rx_divh (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_jc (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_jc.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_jl.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - sr = FLD (in_sr); + INT in_sr = -1; + in_sr = FLD (in_sr); if (insn_referenced & (1 << 1)) referenced |= 1 << 0; if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } return cycles; #undef FLD @@ -1074,17 +1031,18 @@ model_m32rx_jc (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_jnc (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_jc.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_jl.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - sr = FLD (in_sr); + INT in_sr = -1; + in_sr = FLD (in_sr); if (insn_referenced & (1 << 1)) referenced |= 1 << 0; if (insn_referenced & (1 << 2)) referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } return cycles; #undef FLD @@ -1093,17 +1051,18 @@ model_m32rx_jnc (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_jl (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_jl.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_jl.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - sr = FLD (in_sr); + INT in_sr = -1; + in_sr = FLD (in_sr); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } return cycles; #undef FLD @@ -1112,17 +1071,18 @@ model_m32rx_jl (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_jmp (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_jmp.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_jl.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - sr = FLD (in_sr); + INT in_sr = -1; + in_sr = FLD (in_sr); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cti (current_cpu, abuf->idesc, 0, referenced, sr); + cycles += m32rxf_model_m32rx_u_cti (current_cpu, idesc, 0, referenced, in_sr); } return cycles; #undef FLD @@ -1131,19 +1091,20 @@ model_m32rx_jmp (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_ld (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_ld_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = 0; - INT dr = 0; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = 0; + INT out_dr = 0; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr); + cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); } return cycles; #undef FLD @@ -1152,19 +1113,20 @@ model_m32rx_ld (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_ld_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_d.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add3.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = 0; - INT dr = 0; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = 0; + INT out_dr = 0; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr); + cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); } return cycles; #undef FLD @@ -1173,19 +1135,20 @@ model_m32rx_ld_d (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_ldb (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldb.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_ld_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = 0; - INT dr = 0; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = 0; + INT out_dr = 0; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr); + cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); } return cycles; #undef FLD @@ -1194,19 +1157,20 @@ model_m32rx_ldb (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_ldb_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldb_d.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add3.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = 0; - INT dr = 0; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = 0; + INT out_dr = 0; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr); + cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); } return cycles; #undef FLD @@ -1215,19 +1179,20 @@ model_m32rx_ldb_d (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_ldh (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldh.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_ld_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = 0; - INT dr = 0; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = 0; + INT out_dr = 0; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr); + cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); } return cycles; #undef FLD @@ -1236,19 +1201,20 @@ model_m32rx_ldh (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_ldh_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldh_d.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add3.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = 0; - INT dr = 0; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = 0; + INT out_dr = 0; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr); + cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); } return cycles; #undef FLD @@ -1257,19 +1223,20 @@ model_m32rx_ldh_d (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_ldub (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldb.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_ld_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = 0; - INT dr = 0; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = 0; + INT out_dr = 0; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr); + cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); } return cycles; #undef FLD @@ -1278,19 +1245,20 @@ model_m32rx_ldub (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_ldub_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldb_d.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add3.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = 0; - INT dr = 0; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = 0; + INT out_dr = 0; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr); + cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); } return cycles; #undef FLD @@ -1299,19 +1267,20 @@ model_m32rx_ldub_d (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_lduh (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldh.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_ld_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = 0; - INT dr = 0; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = 0; + INT out_dr = 0; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr); + cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); } return cycles; #undef FLD @@ -1320,19 +1289,20 @@ model_m32rx_lduh (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_lduh_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldh_d.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add3.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = 0; - INT dr = 0; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = 0; + INT out_dr = 0; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr); + cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); } return cycles; #undef FLD @@ -1341,31 +1311,32 @@ model_m32rx_lduh_d (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_ld_plus (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld_plus.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_ld_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = 0; - INT dr = 0; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = 0; + INT out_dr = 0; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr); + cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); } { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_sr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_dr = FLD (in_sr); + out_dr = FLD (out_sr); referenced |= 1 << 0; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 1, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1374,18 +1345,19 @@ model_m32rx_ld_plus (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_ld24 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ld24.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_ld24.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + out_dr = FLD (out_dr); referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1394,18 +1366,19 @@ model_m32rx_ld24 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_ldi8 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldi8.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_addi.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + out_dr = FLD (out_dr); referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1414,18 +1387,19 @@ model_m32rx_ldi8 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_ldi16 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_ldi16.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add3.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + out_dr = FLD (out_dr); referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1434,19 +1408,20 @@ model_m32rx_ldi16 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_lock (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_lock.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_ld_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = 0; - INT dr = 0; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = 0; + INT out_dr = 0; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr); + cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); } return cycles; #undef FLD @@ -1455,19 +1430,20 @@ model_m32rx_lock (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_machi_a (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_machi_a.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_machi_a.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -1476,19 +1452,20 @@ model_m32rx_machi_a (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_maclo_a (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_machi_a.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_machi_a.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -1497,19 +1474,20 @@ model_m32rx_maclo_a (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_macwhi_a (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_machi_a.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_machi_a.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -1518,19 +1496,20 @@ model_m32rx_macwhi_a (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_macwlo_a (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_machi_a.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_machi_a.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -1539,20 +1518,23 @@ model_m32rx_macwlo_a (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_mul (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); referenced |= 1 << 0; + referenced |= 1 << 1; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1561,19 +1543,20 @@ model_m32rx_mul (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_mulhi_a (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulhi_a.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_machi_a.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -1582,19 +1565,20 @@ model_m32rx_mulhi_a (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_mullo_a (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulhi_a.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_machi_a.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -1603,19 +1587,20 @@ model_m32rx_mullo_a (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_mulwhi_a (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulhi_a.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_machi_a.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -1624,19 +1609,20 @@ model_m32rx_mulwhi_a (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_mulwlo_a (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulhi_a.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_machi_a.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -1645,20 +1631,21 @@ model_m32rx_mulwlo_a (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_mv (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mv.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_ld_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1667,18 +1654,19 @@ model_m32rx_mv (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_mvfachi_a (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvfachi_a.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_mvfachi_a.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + out_dr = FLD (out_dr); referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1687,18 +1675,19 @@ model_m32rx_mvfachi_a (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_mvfaclo_a (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvfachi_a.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_mvfachi_a.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + out_dr = FLD (out_dr); referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1707,18 +1696,19 @@ model_m32rx_mvfaclo_a (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_mvfacmi_a (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvfachi_a.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_mvfachi_a.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + out_dr = FLD (out_dr); referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1727,18 +1717,19 @@ model_m32rx_mvfacmi_a (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_mvfc (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvfc.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_ld_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + out_dr = FLD (out_dr); referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1747,18 +1738,18 @@ model_m32rx_mvfc (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_mvtachi_a (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvtachi_a.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_mvtachi_a.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_src1); - referenced |= 1 << 0; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_src1); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1767,18 +1758,18 @@ model_m32rx_mvtachi_a (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_mvtaclo_a (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvtachi_a.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_mvtachi_a.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_src1); - referenced |= 1 << 0; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_src1); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1787,18 +1778,19 @@ model_m32rx_mvtaclo_a (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_mvtc (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mvtc.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_ld_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); referenced |= 1 << 0; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1807,20 +1799,21 @@ model_m32rx_mvtc (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_neg (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mv.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_ld_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1829,16 +1822,17 @@ model_m32rx_neg (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_nop (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_nop.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_empty.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1847,20 +1841,21 @@ model_m32rx_nop (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_not (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mv.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_ld_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1869,15 +1864,16 @@ model_m32rx_not (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_rac_dsi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_rac_dsi.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_rac_dsi.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2); + INT in_src1 = -1; + INT in_src2 = -1; + cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -1886,15 +1882,16 @@ model_m32rx_rac_dsi (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_rach_dsi (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_rac_dsi.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_rac_dsi.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2); + INT in_src1 = -1; + INT in_src2 = -1; + cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -1903,16 +1900,17 @@ model_m32rx_rach_dsi (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_rte (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_rte.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_empty.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1921,18 +1919,19 @@ model_m32rx_rte (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_seth (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_seth.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_seth.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + out_dr = FLD (out_dr); referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1941,20 +1940,23 @@ model_m32rx_seth (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_sll (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); referenced |= 1 << 0; + referenced |= 1 << 1; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1963,20 +1965,21 @@ model_m32rx_sll (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_sll3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_sll3.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add3.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -1985,18 +1988,21 @@ model_m32rx_sll3 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_slli (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_slli.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_slli.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); + referenced |= 1 << 1; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -2005,20 +2011,23 @@ model_m32rx_slli (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_sra (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); referenced |= 1 << 0; + referenced |= 1 << 1; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -2027,20 +2036,21 @@ model_m32rx_sra (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_sra3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_sll3.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add3.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -2049,18 +2059,21 @@ model_m32rx_sra3 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_srai (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_slli.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_slli.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); + referenced |= 1 << 1; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -2069,20 +2082,23 @@ model_m32rx_srai (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_srl (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); referenced |= 1 << 0; + referenced |= 1 << 1; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -2091,20 +2107,21 @@ model_m32rx_srl (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_srl3 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_sll3.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add3.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -2113,18 +2130,21 @@ model_m32rx_srl3 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_srli (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_slli.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_slli.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); + referenced |= 1 << 1; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -2133,19 +2153,20 @@ model_m32rx_srli (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_st (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_st_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = 0; - INT src2 = 0; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = 0; + INT in_src2 = 0; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -2154,19 +2175,20 @@ model_m32rx_st (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_st_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_d.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_st_d.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = 0; - INT src2 = 0; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = 0; + INT in_src2 = 0; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -2175,19 +2197,20 @@ model_m32rx_st_d (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_stb (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stb.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_st_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = 0; - INT src2 = 0; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = 0; + INT in_src2 = 0; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -2196,19 +2219,20 @@ model_m32rx_stb (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_stb_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_stb_d.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_st_d.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = 0; - INT src2 = 0; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = 0; + INT in_src2 = 0; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -2217,19 +2241,20 @@ model_m32rx_stb_d (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_sth (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_sth.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_st_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = 0; - INT src2 = 0; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = 0; + INT in_src2 = 0; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -2238,19 +2263,20 @@ model_m32rx_sth (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_sth_d (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_sth_d.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_st_d.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = 0; - INT src2 = 0; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = 0; + INT in_src2 = 0; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -2259,64 +2285,126 @@ model_m32rx_sth_d (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_st_plus (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_plus.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_st_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = 0; - INT src2 = 0; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = 0; + INT in_src2 = 0; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); } { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - dr = FLD (out_src2); - sr = FLD (in_src2); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_dr = FLD (in_src2); + out_dr = FLD (out_src2); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr); + } + return cycles; +#undef FLD +} + +static int +model_m32rx_sth_plus (SIM_CPU *current_cpu, void *sem_arg) +{ +#define FLD(f) abuf->fields.sfmt_st_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + int UNUSED insn_referenced = abuf->written; + INT in_src1 = 0; + INT in_src2 = 0; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 1, referenced, sr, sr2, dr); + referenced |= 1 << 1; + cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); + } + { + int referenced = 0; + int UNUSED insn_referenced = abuf->written; + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_dr = FLD (in_src2); + out_dr = FLD (out_src2); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD } static int -model_m32rx_st_minus (SIM_CPU *current_cpu, void *sem_arg) +model_m32rx_stb_plus (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_st_plus.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_st_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = 0; - INT src2 = 0; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = 0; + INT in_src2 = 0; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_store (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); } { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - dr = FLD (out_src2); - sr = FLD (in_src2); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_dr = FLD (in_src2); + out_dr = FLD (out_src2); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr); + } + return cycles; +#undef FLD +} + +static int +model_m32rx_st_minus (SIM_CPU *current_cpu, void *sem_arg) +{ +#define FLD(f) abuf->fields.sfmt_st_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + int UNUSED insn_referenced = abuf->written; + INT in_src1 = 0; + INT in_src2 = 0; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; - referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 1, referenced, sr, sr2, dr); + referenced |= 1 << 1; + cycles += m32rxf_model_m32rx_u_store (current_cpu, idesc, 0, referenced, in_src1, in_src2); + } + { + int referenced = 0; + int UNUSED insn_referenced = abuf->written; + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_dr = FLD (in_src2); + out_dr = FLD (out_src2); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 1, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -2325,20 +2413,23 @@ model_m32rx_st_minus (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_sub (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_add.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); referenced |= 1 << 0; + referenced |= 1 << 1; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -2347,20 +2438,23 @@ model_m32rx_sub (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_subv (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addv.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); referenced |= 1 << 0; + referenced |= 1 << 1; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -2369,20 +2463,23 @@ model_m32rx_subv (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_subx (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_addx.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_add.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + in_dr = FLD (in_dr); + out_dr = FLD (out_dr); referenced |= 1 << 0; + referenced |= 1 << 1; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -2391,16 +2488,17 @@ model_m32rx_subx (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_trap (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_trap.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_trap.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -2409,15 +2507,16 @@ model_m32rx_trap (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_unlock (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_unlock.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_st_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = 0; - INT dr = 0; - cycles += m32rxf_model_m32rx_u_load (current_cpu, abuf->idesc, 0, referenced, sr, dr); + INT in_sr = 0; + INT out_dr = 0; + cycles += m32rxf_model_m32rx_u_load (current_cpu, idesc, 0, referenced, in_sr, out_dr); } return cycles; #undef FLD @@ -2426,20 +2525,21 @@ model_m32rx_unlock (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_satb (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_satb.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_ld_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -2448,20 +2548,21 @@ model_m32rx_satb (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_sath (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_satb.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_ld_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); referenced |= 1 << 0; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -2470,20 +2571,21 @@ model_m32rx_sath (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_sat (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_sat.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_ld_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - sr = FLD (in_sr); - dr = FLD (out_dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + out_dr = FLD (out_dr); if (insn_referenced & (1 << 1)) referenced |= 1 << 0; referenced |= 1 << 2; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -2492,17 +2594,18 @@ model_m32rx_sat (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_pcmpbz (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_cmpz.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_st_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src2 = FLD (in_src2); referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_cmp (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_cmp (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -2511,15 +2614,16 @@ model_m32rx_pcmpbz (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_sadd (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_sadd.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_empty.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2); + INT in_src1 = -1; + INT in_src2 = -1; + cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -2528,19 +2632,20 @@ model_m32rx_sadd (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_macwu1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_macwu1.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_st_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -2549,19 +2654,20 @@ model_m32rx_macwu1 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_msblo (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_msblo.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_st_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -2570,19 +2676,20 @@ model_m32rx_msblo (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_mulwu1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_mulwu1.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_st_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -2591,19 +2698,20 @@ model_m32rx_mulwu1 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_maclh1 (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.fmt_macwu1.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_st_plus.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT src1 = -1; - INT src2 = -1; - src1 = FLD (in_src1); - src2 = FLD (in_src2); + INT in_src1 = -1; + INT in_src2 = -1; + in_src1 = FLD (in_src1); + in_src2 = FLD (in_src2); referenced |= 1 << 0; referenced |= 1 << 1; - cycles += m32rxf_model_m32rx_u_mac (current_cpu, abuf->idesc, 0, referenced, src1, src2); + cycles += m32rxf_model_m32rx_u_mac (current_cpu, idesc, 0, referenced, in_src1, in_src2); } return cycles; #undef FLD @@ -2612,16 +2720,17 @@ model_m32rx_maclh1 (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_sc (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_sc.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_empty.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -2630,16 +2739,118 @@ model_m32rx_sc (SIM_CPU *current_cpu, void *sem_arg) static int model_m32rx_snc (SIM_CPU *current_cpu, void *sem_arg) { -#define FLD(f) abuf->fields.cti.fields.fmt_sc.f - ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); +#define FLD(f) abuf->fields.sfmt_empty.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + int UNUSED insn_referenced = abuf->written; + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); + } + return cycles; +#undef FLD +} + +static int +model_m32rx_clrpsw (SIM_CPU *current_cpu, void *sem_arg) +{ +#define FLD(f) abuf->fields.sfmt_clrpsw.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + int UNUSED insn_referenced = abuf->written; + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); + } + return cycles; +#undef FLD +} + +static int +model_m32rx_setpsw (SIM_CPU *current_cpu, void *sem_arg) +{ +#define FLD(f) abuf->fields.sfmt_clrpsw.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + int UNUSED insn_referenced = abuf->written; + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); + } + return cycles; +#undef FLD +} + +static int +model_m32rx_bset (SIM_CPU *current_cpu, void *sem_arg) +{ +#define FLD(f) abuf->fields.sfmt_bset.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + int UNUSED insn_referenced = abuf->written; + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + referenced |= 1 << 0; + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); + } + return cycles; +#undef FLD +} + +static int +model_m32rx_bclr (SIM_CPU *current_cpu, void *sem_arg) +{ +#define FLD(f) abuf->fields.sfmt_bset.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; int cycles = 0; { int referenced = 0; int UNUSED insn_referenced = abuf->written; - INT sr = -1; - INT sr2 = -1; - INT dr = -1; - cycles += m32rxf_model_m32rx_u_exec (current_cpu, abuf->idesc, 0, referenced, sr, sr2, dr); + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + referenced |= 1 << 0; + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); + } + return cycles; +#undef FLD +} + +static int +model_m32rx_btst (SIM_CPU *current_cpu, void *sem_arg) +{ +#define FLD(f) abuf->fields.sfmt_bset.f + const ARGBUF * UNUSED abuf = SEM_ARGBUF ((SEM_ARG) sem_arg); + const IDESC * UNUSED idesc = abuf->idesc; + int cycles = 0; + { + int referenced = 0; + int UNUSED insn_referenced = abuf->written; + INT in_sr = -1; + INT in_dr = -1; + INT out_dr = -1; + in_sr = FLD (in_sr); + referenced |= 1 << 0; + cycles += m32rxf_model_m32rx_u_exec (current_cpu, idesc, 0, referenced, in_sr, in_dr, out_dr); } return cycles; #undef FLD @@ -2651,12 +2862,12 @@ model_m32rx_snc (SIM_CPU *current_cpu, void *sem_arg) /* Model timing data for `m32rx'. */ static const INSN_TIMING m32rx_timing[] = { - { M32RXF_INSN_X_INVALID, model_m32rx_x_invalid, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_X_AFTER, model_m32rx_x_after, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_X_BEFORE, model_m32rx_x_before, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_X_CTI_CHAIN, model_m32rx_x_cti_chain, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_X_CHAIN, model_m32rx_x_chain, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, - { M32RXF_INSN_X_BEGIN, model_m32rx_x_begin, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, + { M32RXF_INSN_X_INVALID, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, + { M32RXF_INSN_X_AFTER, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, + { M32RXF_INSN_X_BEFORE, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, + { M32RXF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, + { M32RXF_INSN_X_CHAIN, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, + { M32RXF_INSN_X_BEGIN, 0, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, { M32RXF_INSN_ADD, model_m32rx_add, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, { M32RXF_INSN_ADD3, model_m32rx_add3, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, { M32RXF_INSN_AND, model_m32rx_and, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, @@ -2759,6 +2970,8 @@ static const INSN_TIMING m32rx_timing[] = { { M32RXF_INSN_STH, model_m32rx_sth, { { (int) UNIT_M32RX_U_STORE, 1, 1 } } }, { M32RXF_INSN_STH_D, model_m32rx_sth_d, { { (int) UNIT_M32RX_U_STORE, 1, 2 } } }, { M32RXF_INSN_ST_PLUS, model_m32rx_st_plus, { { (int) UNIT_M32RX_U_STORE, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } }, + { M32RXF_INSN_STH_PLUS, model_m32rx_sth_plus, { { (int) UNIT_M32RX_U_STORE, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } }, + { M32RXF_INSN_STB_PLUS, model_m32rx_stb_plus, { { (int) UNIT_M32RX_U_STORE, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } }, { M32RXF_INSN_ST_MINUS, model_m32rx_st_minus, { { (int) UNIT_M32RX_U_STORE, 1, 1 }, { (int) UNIT_M32RX_U_EXEC, 1, 0 } } }, { M32RXF_INSN_SUB, model_m32rx_sub, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, { M32RXF_INSN_SUBV, model_m32rx_subv, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, @@ -2776,6 +2989,11 @@ static const INSN_TIMING m32rx_timing[] = { { M32RXF_INSN_MACLH1, model_m32rx_maclh1, { { (int) UNIT_M32RX_U_MAC, 1, 1 } } }, { M32RXF_INSN_SC, model_m32rx_sc, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, { M32RXF_INSN_SNC, model_m32rx_snc, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, + { M32RXF_INSN_CLRPSW, model_m32rx_clrpsw, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, + { M32RXF_INSN_SETPSW, model_m32rx_setpsw, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, + { M32RXF_INSN_BSET, model_m32rx_bset, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, + { M32RXF_INSN_BCLR, model_m32rx_bclr, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, + { M32RXF_INSN_BTST, model_m32rx_btst, { { (int) UNIT_M32RX_U_EXEC, 1, 1 } } }, }; #endif /* WITH_PROFILE_MODEL_P */ @@ -2792,7 +3010,7 @@ m32rx_model_init (SIM_CPU *cpu) #define TIMING_DATA(td) 0 #endif -static const MODEL m32rx_models[] = +static const SIM_MODEL m32rx_models[] = { { "m32rx", & m32rx_mach, MODEL_M32RX, TIMING_DATA (& m32rx_timing[0]), m32rx_model_init }, { 0 } @@ -2800,7 +3018,7 @@ static const MODEL m32rx_models[] = /* The properties of this cpu's implementation. */ -static const MACH_IMP_PROPERTIES m32rxf_imp_properties = +static const SIM_MACH_IMP_PROPERTIES m32rxf_imp_properties = { sizeof (SIM_CPU), #if WITH_SCACHE @@ -2810,13 +3028,20 @@ static const MACH_IMP_PROPERTIES m32rxf_imp_properties = #endif }; + +static void +m32rxf_prepare_run (SIM_CPU *cpu) +{ + if (CPU_IDESC (cpu) == NULL) + m32rxf_init_idesc_table (cpu); +} + static const CGEN_INSN * -m32rxf_opcode (SIM_CPU *cpu, int inum) +m32rxf_get_idata (SIM_CPU *cpu, int inum) { - return CPU_IDESC (cpu) [inum].opcode; + return CPU_IDESC (cpu) [inum].idata; } -/* start-sanitize-m32rx */ static void m32rx_init_cpu (SIM_CPU *cpu) { @@ -2824,8 +3049,8 @@ m32rx_init_cpu (SIM_CPU *cpu) CPU_REG_STORE (cpu) = m32rxf_store_register; CPU_PC_FETCH (cpu) = m32rxf_h_pc_get; CPU_PC_STORE (cpu) = m32rxf_h_pc_set; - CPU_OPCODE (cpu) = m32rxf_opcode; - CPU_MAX_INSNS (cpu) = M32RXF_INSN_MAX; + CPU_GET_IDATA (cpu) = m32rxf_get_idata; + CPU_MAX_INSNS (cpu) = M32RXF_INSN__MAX; CPU_INSN_NAME (cpu) = cgen_insn_name; CPU_FULL_ENGINE_FN (cpu) = m32rxf_engine_run_full; #if WITH_FAST @@ -2833,14 +3058,13 @@ m32rx_init_cpu (SIM_CPU *cpu) #else CPU_FAST_ENGINE_FN (cpu) = m32rxf_engine_run_full; #endif - m32rxf_init_idesc_table (cpu); } -const MACH m32rx_mach = +const SIM_MACH m32rx_mach = { - "m32rx", "m32rx", + "m32rx", "m32rx", MACH_M32RX, 32, 32, & m32rx_models[0], & m32rxf_imp_properties, - m32rx_init_cpu + m32rx_init_cpu, + m32rxf_prepare_run }; -/* end-sanitize-m32rx */