X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fmcore%2FChangeLog;h=b2a9731ee52686b3fb0106d312d8d37c85a8c00e;hb=3922b302645fda04da42a5279399578ae2f6206c;hp=dfff00e3c9dd9736025df9058c00c55858fe4134;hpb=20e95c23ab729a24aa7533de3a61b6e2c49506ea;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/mcore/ChangeLog b/sim/mcore/ChangeLog index dfff00e3c9..b2a9731ee5 100644 --- a/sim/mcore/ChangeLog +++ b/sim/mcore/ChangeLog @@ -1,3 +1,441 @@ +2017-09-06 John Baldwin + + * configure: Regenerate. + +2016-01-10 Mike Frysinger + + * config.in, configure: Regenerate. + +2016-01-10 Mike Frysinger + + * configure: Regenerate. + +2016-01-10 Mike Frysinger + + * configure.ac (SIM_AC_OPTION_ENVIRONMENT): Delete call. + * configure: Regenerate. + +2016-01-10 Mike Frysinger + + * configure: Regenerate. + +2016-01-10 Mike Frysinger + + * configure: Regenerate. + +2016-01-10 Mike Frysinger + + * configure.ac (SIM_AC_OPTION_INLINE): Delete call. + * configure: Regenerate. + +2016-01-10 Mike Frysinger + + * configure: Regenerate. + +2016-01-10 Mike Frysinger + + * configure: Regenerate. + +2016-01-09 Mike Frysinger + + * config.in, configure: Regenerate. + +2016-01-06 Mike Frysinger + + * interp.c (sim_open): Mark argv const. + (sim_create_inferior): Mark argv and env const. + +2016-01-04 Mike Frysinger + + * configure: Regenerate. + +2016-01-03 Mike Frysinger + + * interp.c (sim_open): Update sim_parse_args comment. + +2016-01-03 Mike Frysinger + + * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete. + * configure: Regenerate. + +2016-01-02 Mike Frysinger + + * configure: Regenerate. + +2015-12-27 Mike Frysinger + + * Makefile.in (SIM_OBJS): Delete sim-hload.o. + +2015-12-26 Mike Frysinger + + * config.in, configure: Regenerate. + +2015-11-15 Mike Frysinger + + * Makefile.in (SIM_OBJS): Delete sim-reason.o, sim-reg.o, and + sim-stop.o. + +2015-11-15 Mike Frysinger + + * interp.c (mcore_regset, LAST_VALID_CREG, NUM_MCORE_REGS: Move + to sim-main.h. + (cpu): Delete. + (gr, cr): Change from asregs to cpu. + (sr, vbr, esr, fsr, epc, fpc, ss0, ss1, ss2, ss3, ss4, gcr, gsr): + Change from asregs to cr. + (C_ON, C_VALUE, C_OFF, SET_C, CLR_C, NEW_C, SR_AF): Change from + cpu.sr to sr. + (set_active_regs): Define. + (set_initial_gprs): Rename scpu to cpu. Change cpu.sr to sr and + cpu.gr to gr. Replace for loop with memset. Replace SR_AF with + set_active_regs. + (handle_trap1): Add cpu arg. + (process_stub): Likewise. Change cpu.gr to gr. + (util): Rename scpu to cpu. Change cpu.gr to gr. + (rbat, rhat, rlat, wbat, what, wlat, ILLEGAL, sim_engine_run, + mcore_reg_store, mcore_reg_fetch, sim_create_inferior): Rename scpu + to cpu. + (step_once): Likewise. Replace SR_AF with set_active_regs. Adjust + cpu.asregs to cpu. + (mcore_pc_get, mcore_pc_set): Adjust cpu->pc to cpu->regs.pc. + * sim-main.h (mcore_regset, LAST_VALID_CREG, NUM_MCORE_REGS: Move + from interp.c. + (_sim_cpu): Add regs, asints, active_gregs, ticks, stalls, cycles, + and insts members. + +2015-11-15 Mike Frysinger + + * Makefile.in (SIM_OBJS): Add sim-reg.o. + * interp.c (sim_store_register): Rename to ... + (mcore_reg_store): ... this. Change SIM_DESC to SIM_CPU. + (sim_fetch_register): Rename to ... + (mcore_reg_fetch): ... this. Change SIM_DESC to SIM_CPU. + (sim_open): Call CPU_REG_FETCH and CPU_REG_STORE. + +2015-11-15 Mike Frysinger + + * Makefile.in (SIM_OBJS): Add sim-reason.o and sim-resume.o. + * interp.c (struct mcore_regset): Delete exception. + (util): Add SIM_DESC and SIM_CPU args. Call sim_engine_halt instead + of setting cpu.asregs.exception. + (ILLEGAL): Define. + (sim_resume): Rename to ... + (step_once): ... this. Delete cpu.asregs.exception initialization. + Delete do/while statements while keeping the body. Replace SIGTRAP + usage with sim_engine_halt(SIM_SIGTRAP). Replace SIGILL usage with + ILLEGAL. Pass sd and cpu down to util. + (sim_engine_run): Define. + (sim_stop_reason): Delete. + +2015-11-14 Mike Frysinger + + * interp.c (sim_close): Delete. + +2015-06-23 Mike Frysinger + + * configure: Regenerate. + +2015-06-17 Mike Frysinger + + * interp.c (handle_trap1): Replace call to cb_syscall with + sim_syscall. + +2015-06-17 Mike Frysinger + + * interp.c: Include sim-syscall.h. + (syscall_read_mem, syscall_write_mem): Delete. + (m32r_trap): Change syscall_read_mem/syscall_write_mem + to sim_syscall_read_mem/sim_syscall_write_mem. + +2015-06-12 Mike Frysinger + + * configure: Regenerate. + +2015-06-12 Mike Frysinger + + * configure: Regenerate. + +2015-04-21 Mike Frysinger + + * interp.c (sim_resume): Change %x to %lx for all cpu registers. + +2015-04-21 Mike Frysinger + + * interp.c (mcore_regset): Delete msize & memory. + (issue_messages, mem, wbat, what, wlat, rbat, what, wlat, + sim_memory_size, MEM_SIZE_FLOOR, sim_size, init_pointers): Delete. + (DEFAULT_MEMORY_SIZE): Define. + (set_initial_gprs): Delete memsize handling and call to init_pointers. + Change cpu.asregs.msize to DEFAULT_MEMORY_SIZE. + (syscall_read_mem): Change memcpy to sim_core_read_buffer. + (syscall_write_mem): Change memcpy to sim_core_write_buffer. + (process_stub): Change issue_messages to STATE_VERBOSE_P. + (util): Turn printf into a stub. Change issue_messages to + STATE_VERBOSE_P. + (rbat, rhat, rlat, wbat, what, wlat): Define to sim core funcs. + (sim_resume): Change issue_messages to STATE_VERBOSE_P. + Delete cpu.asregs.msize range checks. + (sim_write, sim_read): Delete. + (sim_store_register, sim_fetch_register): Delete call to + init_pointers. + (sim_open): Delete osize, call to sim_size, and issue_messages. Call + sim_do_commandf to setup memory. + (sim_create_inferior): Delete issue_messages handling. Change + cpu.asregs.msize to DEFAULT_MEMORY_SIZE. Change strcpy to + sim_core_write_buffer. + +2015-04-21 Mike Frysinger + + * interp.c (WATCHFUNCTIONS): Undef it. + (sim_resume): Move WLhash behind WATCHFUNCTIONS. + (sim_do_command): Delete. + +2015-04-21 Mike Frysinger + + * Makefile.in (NL_TARGET): Define. + * interp.c (NUM_ELEM, opened, log_open, log_close, is_opened): Delete. + (syscall_read_mem, syscall_write_mem): New functions. + (handle_trap1): Delete entire body. Replace with call to cb_syscall. + +2015-04-18 Mike Frysinger + + * sim-main.h (SIM_CPU): Delete. + +2015-04-18 Mike Frysinger + + * sim-main.h (sim_cia): Delete. + +2015-04-17 Mike Frysinger + + * interp.c (set_initial_gprs): Change CIA_SET to CPU_PC_SET. + (sim_resume): Change CIA_GET to CPU_PC_GET and CIA_SET to + CPU_PC_SET. + (sim_create_inferior): Change CIA_SET to CPU_PC_SET. + * sim-main.h (CIA_GET, CIA_SET): Delete. + +2015-04-16 Mike Frysinger + + * interp.c (mcore_pc_get, mcore_pc_set): New functions. + (sim_open): Call CPU_PC_FETCH & CPU_PC_STORE for all cpus. + +2015-04-15 Mike Frysinger + + * Makefile.in (SIM_OBJS): Delete sim-cpu.o. + * sim-main.h (STATE_CPU): Delete. + +2015-04-13 Mike Frysinger + + * configure: Regenerate. + +2015-04-06 Mike Frysinger + + * Makefile.in (SIM_OBJS): Delete sim-engine.o. + +2015-03-31 Mike Frysinger + + * config.in, configure: Regenerate. + +2015-03-29 Mike Frysinger + + * interp.c (struct aout, LONG, SHORT): Delete. + +2015-03-29 Mike Frysinger + + * Makefile.in (SIM_RUN_OBJS, SIM_EXTRA_CFLAGS, SIM_EXTRA_LIBS): Delete. + (SIM_OBJS): Change to $(SIM_NEW_COMMON_OBJS). + * interp.c: Include sim-main.h, sim-base.h, and sim-options.h. + (word, uword): Move to sim-main.h. + (callback, sim_kind, myname): Delete. + (struct mcore_regset): Move pc to sim_cpu. + (memcycles, sim_size): Mark static. + (set_initial_gprs): Take a sim_cpu arg. Set pc via CIA_SET. + (handle_trap1): Take a SIM_DESC arg. Get callback from it. + (process_stub): Take a SIM_DESC arg. Pass it to handle_trap1 + (util): Take a SIM_DESC arg. Pass it to process_stub. + (sim_resume): Get/set pc via CIA_GET/CIA_SET. Pass sd to handle_trap1 + and util. + (sim_trace, sim_stop, sim_load, sim_set_callbacks): Delete. + (sim_info): Get callback from SIM_DESC. + (free_state): New cleanup function. + (sim_open): Rewrite to use new common logic. + (sim_create_inferior): Get sim_cpu from sd. Pass to set_initial_gprs + and set pc via CIA_SET. + * sim-main.h: New file. + +2015-03-29 Mike Frysinger + + * configure.ac: Call SIM_AC_OPTION_ENDIAN, SIM_AC_OPTION_ALIGNMENT, + SIM_AC_OPTION_HOSTENDIAN, SIM_AC_OPTION_ENVIRONMENT, and + SIM_AC_OPTION_INLINE. + * config.in, configure: Regenerate. + +2015-03-29 Mike Frysinger + + * interp.c (heap_ptr, int_sbrk): Delete. + (handle_trap1): Change case 69 (sbrk) to always return -1. + (sim_load): Delete bss checks and heap_ptr setup. + +2015-03-16 Mike Frysinger + + * interp.c: Strip trailing whitespace. + +2015-03-16 Mike Frysinger + + * configure.ac: Call SIM_AC_OPTION_WARNINGS. + * confingure: Regenerate. + * interp.c (mcore_extract_unsigned_integer): Make static and update + prototype. Fix up printf string. + (mcore_store_unsigned_integer): Make static and update prototype. + (int_sbrk): Likewise. + (wbat, wlat, what, rbat, rlat, rhat): Delete INLINE and update + prototype. + (SEXTB, SEXTW, IOMEM): Delete. + (sim_size): Update prototype. Fix up printf string. + (init_pointers): Update prototype. + (set_initial_gprs): Update prototype. Fix up printf string. + (log_open, log_close, is_opened, handle_trap1, process_stub, util, + iu_carry): Update prototype. + (sim_resume): Update prototype. Change addr to a word. + (sim_write, sim_read, sim_store_register, sim_fetch_register, + sim_trace, sim_stop_reason, sim_stop, sim_info, sim_open, + sim_close, sim_load, sim_create_inferior, sim_do_command, + sim_set_callbacks): Update prototype. + +2015-03-16 Mike Frysinger + + * config.in, configure: Regenerate. + +2015-03-14 Mike Frysinger + + * Makefile.in (SIM_EXTRA_CLEAN): Delete. + (interp.o, mcore-clean): Delete rules. + +2015-03-14 Mike Frysinger + + * Makefile.in (SIM_EXTRA_CFLAGS): Set to + -DSIM_USE_DEPRECATED_RUN_FRONTEND. + (SIM_RUN_OBJS): Set to run.o. + +2015-03-14 Mike Frysinger + + * configure.ac (AC_CHECK_HEADERS): Delete. + * aclocal.m4, configure: Regenerate. + +2015-02-20 Mike Frysinger + + * interp.c: Delete sysdep.h and netinet/in.h includes. + Include stdlib.h and string.h. + * sysdep.h: Delete. + +2015-02-19 Mike Frysinger + + * interp.c (sim_kill): Delete unused func. + +2015-02-11 Chen Gang + + * interp.c: Include "unistd.h". + +2015-02-02 Chen Gang + + * interp.c (sim_do_command): Call freeargv() before return. + +2014-08-19 Alan Modra + + * configure: Regenerate. + +2014-08-15 Roland McGrath + + * configure: Regenerate. + * config.in: Regenerate. + +2014-03-10 Mike Frysinger + + * interp.c (sim_do_command): Add const to cmd. + +2014-03-05 Mike Frysinger + + * interp.c (sim_load): Add const to prog. + +2014-02-17 Mike Frysinger + + PR gdb/16450 + * interp.c (interrupt): Delete. + (sim_resume): Delete signal(SIGINT) handling. + +2013-09-23 Alan Modra + + * configure: Regenerate. + +2013-06-03 Mike Frysinger + + * aclocal.m4, configure: Regenerate. + +2012-06-15 Joel Brobecker + + * config.in, configure: Regenerate. + +2012-05-20 Hans-Peter Nilsson + + PR 14072 + * interp.c: Include config.h before system header files. + +2012-03-24 Mike Frysinger + + * aclocal.m4, config.in, configure: Regenerate. + +2011-12-03 Mike Frysinger + + * aclocal.m4: New file. + * configure: Regenerate. + +2011-10-17 Mike Frysinger + + * configure.ac: Change include to common/acinclude.m4. + +2011-10-17 Mike Frysinger + + * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER + call. Replace common.m4 include with SIM_AC_COMMON. + * configure: Regenerate. + +2010-04-14 Mike Frysinger + + * interp.c (sim_write): Add const to buffer arg. + +2010-01-09 Ralf Wildenhues + + * configure: Regenerate. + +2009-08-22 Ralf Wildenhues + + * config.in: Regenerate. + * configure: Likewise. + + * configure: Regenerate. + +2008-07-11 Hans-Peter Nilsson + + * configure: Regenerate to track ../common/common.m4 changes. + * config.in: Ditto. + +2008-06-06 Vladimir Prus + Daniel Jacobowitz + Joseph Myers + + * configure: Regenerate. + +2006-12-21 Hans-Peter Nilsson + + * config.in: Regenerate. + +2006-06-13 Richard Earnshaw + + * configure: Regenerated. + +2006-06-05 Daniel Jacobowitz + + * configure: Regenerated. + 2006-05-31 Daniel Jacobowitz * configure: Regenerated. @@ -61,7 +499,7 @@ Tue May 23 21:39:23 2000 Andrew Cagney * interp.c (target_big_endian): New variable. (mcore_extract_unsigned_integer, mcore_store_unsigned_integer, wlat, rlat, sim_resume, sim_load): Add supprot for little - endian targets. + endian targets. 2000-01-13 Nick Clifton @@ -90,7 +528,7 @@ Thu Sep 2 18:15:53 1999 Andrew Cagney 1999-05-08 Felix Lee * configure: Regenerated to track ../common/aclocal.m4 changes. - + 1999-05-10 Nick Clifton * interp.c (sim_resume): Record PC in case it is needed for error