X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fmicroblaze%2Finterp.c;h=be541347495622ec45c857452034278086383bc7;hb=41792d688a5a1f158d6e9ecda2b603ae122d69a1;hp=e05c107dc6c5448452d95acf115bfb1ba4e444fc;hpb=c85fc61074e9fab1bafbae97ea4628c7bffaaf76;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/microblaze/interp.c b/sim/microblaze/interp.c index e05c107dc6..be54134749 100644 --- a/sim/microblaze/interp.c +++ b/sim/microblaze/interp.c @@ -1,5 +1,5 @@ /* Simulator for Xilinx MicroBlaze processor - Copyright 2009-2015 Free Software Foundation, Inc. + Copyright 2009-2020 Free Software Foundation, Inc. This file is part of GDB, the GNU debugger. @@ -31,7 +31,7 @@ #include "microblaze-dis.h" -#define target_big_endian (CURRENT_TARGET_BYTE_ORDER == BIG_ENDIAN) +#define target_big_endian (CURRENT_TARGET_BYTE_ORDER == BFD_ENDIAN_BIG) static unsigned long microblaze_extract_unsigned_integer (unsigned char *addr, int len) @@ -110,7 +110,10 @@ set_initial_gprs (SIM_CPU *cpu) static int tracing = 0; void -sim_resume (SIM_DESC sd, int step, int siggnal) +sim_engine_run (SIM_DESC sd, + int next_cpu_nr, /* ignore */ + int nr_cpus, /* ignore */ + int siggnal) /* ignore */ { SIM_CPU *cpu = STATE_CPU (sd, 0); int needfetch; @@ -132,13 +135,11 @@ sim_resume (SIM_DESC sd, int step, int siggnal) short num_delay_slot; /* UNUSED except as reqd parameter */ enum microblaze_instr_type insn_type; - CPU.exception = step ? SIGTRAP : 0; - memops = 0; bonus_cycles = 0; insts = 0; - do + while (1) { /* Fetch the initial instructions that we'll decode. */ inst = MEM_RD_WORD (PC & 0xFFFFFFFC); @@ -161,12 +162,12 @@ sim_resume (SIM_DESC sd, int step, int siggnal) delay_slot_enable = 0; branch_taken = 0; if (op == microblaze_brk) - CPU.exception = SIGTRAP; + sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_stopped, SIM_SIGTRAP); else if (inst == MICROBLAZE_HALT_INST) { - CPU.exception = SIGQUIT; insts += 1; bonus_cycles++; + sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_exited, RETREG); } else { @@ -180,7 +181,8 @@ sim_resume (SIM_DESC sd, int step, int siggnal) #undef INSTRUCTION default: - CPU.exception = SIGILL; + sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_signalled, + SIM_SIGILL); fprintf (stderr, "ERROR: Unknown opcode\n"); } /* Make R0 consistent */ @@ -238,7 +240,8 @@ sim_resume (SIM_DESC sd, int step, int siggnal) if (STATE_VERBOSE_P (sd)) fprintf (stderr, "Cannot have branch or return instructions " "in delay slot (at address 0x%x)\n", PC); - CPU.exception = SIGILL; + sim_engine_halt (sd, NULL, NULL, NULL_CIA, sim_signalled, + SIM_SIGILL); } else { @@ -252,7 +255,8 @@ sim_resume (SIM_DESC sd, int step, int siggnal) #undef INSTRUCTION default: - CPU.exception = SIGILL; + sim_engine_halt (sd, NULL, NULL, NULL_CIA, + sim_signalled, SIM_SIGILL); fprintf (stderr, "ERROR: Unknown opcode at 0x%x\n", PC); } /* Update cycle counts */ @@ -287,8 +291,10 @@ sim_resume (SIM_DESC sd, int step, int siggnal) if (tracing) fprintf (stderr, "\n"); + + if (sim_events_tick (sd)) + sim_events_process (sd); } - while (!CPU.exception); /* Hide away the things we've cached while executing. */ /* CPU.pc = pc; */ @@ -298,11 +304,9 @@ sim_resume (SIM_DESC sd, int step, int siggnal) CPU.cycles += memops; /* and memop cycle delays */ } -int -sim_store_register (SIM_DESC sd, int rn, unsigned char *memory, int length) +static int +microblaze_reg_store (SIM_CPU *cpu, int rn, unsigned char *memory, int length) { - SIM_CPU *cpu = STATE_CPU (sd, 0); - if (rn < NUM_REGS + NUM_SPECIAL && rn >= 0) { if (length == 4) @@ -322,10 +326,9 @@ sim_store_register (SIM_DESC sd, int rn, unsigned char *memory, int length) return 0; } -int -sim_fetch_register (SIM_DESC sd, int rn, unsigned char *memory, int length) +static int +microblaze_reg_fetch (SIM_CPU *cpu, int rn, unsigned char *memory, int length) { - SIM_CPU *cpu = STATE_CPU (sd, 0); long ival; if (rn < NUM_REGS + NUM_SPECIAL && rn >= 0) @@ -348,23 +351,6 @@ sim_fetch_register (SIM_DESC sd, int rn, unsigned char *memory, int length) return 0; } -void -sim_stop_reason (SIM_DESC sd, enum sim_stop *reason, int *sigrc) -{ - SIM_CPU *cpu = STATE_CPU (sd, 0); - - if (CPU.exception == SIGQUIT) - { - *reason = sim_exited; - *sigrc = RETREG; - } - else - { - *reason = sim_stopped; - *sigrc = CPU.exception; - } -} - void sim_info (SIM_DESC sd, int verbose) { @@ -399,7 +385,8 @@ free_state (SIM_DESC sd) } SIM_DESC -sim_open (SIM_OPEN_KIND kind, host_callback *cb, struct bfd *abfd, char **argv) +sim_open (SIM_OPEN_KIND kind, host_callback *cb, + struct bfd *abfd, char * const *argv) { int i; SIM_DESC sd = sim_state_alloc (kind, cb); @@ -418,9 +405,7 @@ sim_open (SIM_OPEN_KIND kind, host_callback *cb, struct bfd *abfd, char **argv) return 0; } - /* getopt will print the error message so we just have to exit if this fails. - FIXME: Hmmm... in the case of gdb we need getopt to call - print_filtered. */ + /* The parser will print an error message for us, so we silently return. */ if (sim_parse_args (sd, argv) != SIM_RC_OK) { free_state (sd); @@ -458,6 +443,8 @@ sim_open (SIM_OPEN_KIND kind, host_callback *cb, struct bfd *abfd, char **argv) { SIM_CPU *cpu = STATE_CPU (sd, i); + CPU_REG_FETCH (cpu) = microblaze_reg_fetch; + CPU_REG_STORE (cpu) = microblaze_reg_store; CPU_PC_FETCH (cpu) = microblaze_pc_get; CPU_PC_STORE (cpu) = microblaze_pc_set; @@ -470,14 +457,9 @@ sim_open (SIM_OPEN_KIND kind, host_callback *cb, struct bfd *abfd, char **argv) return sd; } -void -sim_close (SIM_DESC sd, int quitting) -{ - /* Do nothing. */ -} - SIM_RC -sim_create_inferior (SIM_DESC sd, struct bfd *prog_bfd, char **argv, char **env) +sim_create_inferior (SIM_DESC sd, struct bfd *prog_bfd, + char * const *argv, char * const *env) { SIM_CPU *cpu = STATE_CPU (sd, 0);