X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fmips%2FChangeLog;h=31f5570393380c6d1c689892469208b0b97fefed;hb=af0b2a3e85df9f49a3528e5b7578fcf9412f1acc;hp=0518a578a4dd7ed83cf2f73492ed09ad2ca67e7d;hpb=99d8e879938c947588332a9cc579d378ccc2a855;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index 0518a578a4..31f5570393 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,63 @@ +2017-09-06 John Baldwin + + * configure: Regenerate. + +2016-11-11 Mike Frysinger + + PR sim/20808 + * dv-tx3904cpu.c (deliver_tx3904cpu_interrupt): Define CPU to cpu + and SD to sd. + +2016-11-11 Mike Frysinger + + PR sim/20809 + * mips.igen (check_u64): Enable for `r3900'. + +2016-02-05 Mike Frysinger + + * configure.ac (sim_engine_run): Change sd->base.prog_bfd to + STATE_PROG_BFD (sd). + * configure: Regenerate. + +2016-01-18 Andrew Bennett + Maciej W. Rozycki + + PR sim/19441 + * micromips.igen (delayslot_micromips): Enable for `micromips32', + `micromips64' and `micromipsdsp' only. + (process_isa_mode): Enable for `micromips32' and `micromips64' only. + (do_micromips_jalr, do_micromips_jal): Likewise. + (compute_movep_src_reg): Likewise. + (compute_andi16_imm): Likewise. + (convert_fmt_micromips): Likewise. + (convert_fmt_micromips_cvt_d): Likewise. + (convert_fmt_micromips_cvt_s): Likewise. + (FMT_MICROMIPS): Likewise. + (FMT_MICROMIPS_CVT_D): Likewise. + (FMT_MICROMIPS_CVT_S): Likewise. + +2016-01-12 Mike Frysinger + + * interp.c: Include elf-bfd.h. + (sim_create_inferior): Truncate pc to 32-bits when EI_CLASS is + ELFCLASS32. + +2016-01-10 Mike Frysinger + + * config.in, configure: Regenerate. + +2016-01-10 Mike Frysinger + + * configure: Regenerate. + +2016-01-10 Mike Frysinger + + * configure: Regenerate. + +2016-01-10 Mike Frysinger + + * configure: Regenerate. + 2016-01-10 Mike Frysinger * configure: Regenerate.