X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fmips%2FChangeLog;h=82afc312e760d6e2215aca6870fdd85cff9a144b;hb=c58fa2cc43ed06269fa16cd31abe5650d39c23a3;hp=d202aa0d5980f7d120fb0f494fc860e7fe28fbca;hpb=fa803dc60f0bf01297674c41d001798e18ade4dc;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog index d202aa0d59..82afc312e7 100644 --- a/sim/mips/ChangeLog +++ b/sim/mips/ChangeLog @@ -1,3 +1,247 @@ +start-sanitize-tx19 +Thu Apr 16 09:14:44 1998 Andrew Cagney + + * configure.in (tx19, sim_use_gen): Switch to igen. + * configure: Re-build. + +end-sanitize-tx19 +start-sanitize-sky +Wed Apr 15 12:41:18 1998 Frank Ch. Eigler + + * interp.c (decode_coproc): Make COP2 branch code compile after + igen signature changes. + +end-sanitize-sky +Wed Apr 15 18:31:54 1998 Andrew Cagney + + * mips.igen (DSRAV): Use function do_dsrav. + (SRAV): Use new function do_srav. + + * m16.igen (BEQZ, BNEZ): Compare GPR[TRX] not GPR[RX]. + (B): Sign extend 11 bit immediate. + (EXT-B*): Shift 16 bit immediate left by 1. + (ADDIU*): Don't sign extend immediate value. + +Wed Apr 15 10:32:15 1998 Andrew Cagney + + * m16run.c (sim_engine_run): Restore CIA after handling an event. + +start-sanitize-tx19 + * mips.igen (mtc0): Valid tx19 instruction. + +end-sanitize-tx19 + * sim-main.h (DELAY_SLOT, NULLIFY_NEXT_INSTRUCTION): For IGEN, use + functions. + + * mips.igen (delayslot32, nullify_next_insn): New functions. + (m16.igen): Always include. + (do_*): Add more tracing. + + * m16.igen (delayslot16): Add NIA argument, could be called by a + 32 bit MIPS16 instruction. + + * interp.c (ifetch16): Move function from here. + * sim-main.c (ifetch16): To here. + + * sim-main.c (ifetch16, ifetch32): Update to match current + implementations of LH, LW. + (signal_exception): Don't print out incorrect hex value of illegal + instruction. + +Wed Apr 15 00:17:25 1998 Andrew Cagney + + * m16run.c (sim_engine_run): Use IMEM16 and IMEM32 to fetch an + instruction. + + * m16.igen: Implement MIPS16 instructions. + + * mips.igen (do_addiu, do_addu, do_and, do_daddiu, do_daddu, + do_ddiv, do_ddivu, do_div, do_divu, do_dmultx, do_dmultu, do_srav, + do_dsubu, do_mfhi, do_mflo, do_mult, do_multu, do_nor, do_or, + do_sll, do_sllv, do_slt, do_slti, do_sltiu, do_sltu, do_sra, + do_srl, do_srlv, do_subu, do_xor, do_xori): New functions. Move + bodies of corresponding code from 32 bit insn to these. Also used + by MIPS16 versions of functions. + + * sim-main.h (RAIDX, T8IDX, T8, SPIDX): Define. + (IMEM16): Drop NR argument from macro. + +start-sanitize-sky +Mon Apr 13 16:28:52 1998 Frank Ch. Eigler + + * interp.c (decode_coproc): Add proper 1000000 bit-string at top + of VU lower instruction. + +end-sanitize-sky +start-sanitize-sky +Thu Apr 9 16:38:23 1998 Frank Ch. Eigler + + * r5900.igen (LQC,SQC): Adapted code to DOUBLEWORD accesses + instead of QUADWORD. + + * sim-main.h: Removed attempt at allowing 128-bit access. + +end-sanitize-sky +start-sanitize-sky +Wed Apr 8 18:12:13 1998 Frank Ch. Eigler + + * Makefile.in (SIM_SKY_OBJS): Added sky-vudis.o. + + * interp.c (decode_coproc): Refer to VU CIA as a "special" + register, not as a "misc" register. Aha. Add activity + assertions after VCALLMS* instructions. + +end-sanitize-sky +start-sanitize-sky +Tue Apr 7 18:32:49 1998 Frank Ch. Eigler + + * interp.c (decode_coproc): Do not apply superfluous E (end) flag + to upper code of generated VU instruction. + +end-sanitize-sky +start-sanitize-sky +Mon Apr 6 19:55:56 1998 Frank Ch. Eigler + + * interp.c (cop_[ls]q): Replaced stub with proper COP2 code. + + * sim-main.h (LOADADDRMASK): Redefine to allow 128-bit accesses + for TARGET_SKY. + + * r5900.igen (SQC2): Thinko. + +end-sanitize-sky +start-sanitize-sky +Sun Apr 5 12:05:44 1998 Frank Ch. Eigler + + * interp.c (*): Adapt code to merged VU device & state structs. + (decode_coproc): Execute COP2 each macroinstruction without + pipelining, by stepping VU to completion state. Adapted to + read_vu_*_reg style of register access. + + * mips.igen ([SL]QC2): Removed these COP2 instructions. + + * r5900.igen ([SL]QC2): Transplanted these COP2 instructions here. + + * sim-main.h (cop_[ls]q): Enclosed in TARGET_SKY guards. + +end-sanitize-sky +Sat Apr 4 22:39:50 1998 Andrew Cagney + + * Makefile.in (SIM_OBJS): Add sim-main.o. + + * sim-main.h (address_translation, load_memory, store_memory, + cache_op, sync_operation, prefetch, ifetch32, pending_tick): Mark + as INLINE_SIM_MAIN. + (pr_addr, pr_uword64): Declare. + (sim-main.c): Include when H_REVEALS_MODULE_P. + + * interp.c (address_translation, load_memory, store_memory, + cache_op, sync_operation, prefetch, ifetch32, pending_tick): Move + from here. + * sim-main.c: To here. Fix compilation problems. + + * configure.in: Enable inlining. + * configure: Re-config. + +Sat Apr 4 20:36:25 1998 Andrew Cagney + + * configure: Regenerated to track ../common/aclocal.m4 changes. + +Fri Apr 3 04:32:35 1998 Andrew Cagney + + * mips.igen: Include tx.igen. + * Makefile.in (IGEN_INCLUDE): Add tx.igen. + * tx.igen: New file, contains MADD and MADDU. + + * interp.c (load_memory): When shifting bytes, use LOADDRMASK not + the hardwired constant `7'. + (store_memory): Ditto. + (LOADDRMASK): Move definition to sim-main.h. + + mips.igen (MTC0): Enable for r3900. + (ADDU): Add trace. + + mips.igen (do_load_byte): Delete. + (do_load, do_store, do_load_left, do_load_write, do_store_left, + do_store_right): New functions. + (SW*, LW*, SD*, LD*, SH, LH, SB, LB): Use. + + configure.in: Let the tx39 use igen again. + configure: Update. + +Thu Apr 2 10:59:39 1998 Andrew Cagney + + * interp.c (sim_monitor): get_mem_info returns a 4 byte quantity, + not an address sized quantity. Return zero for cache sizes. + +Wed Apr 1 23:47:53 1998 Andrew Cagney + + * mips.igen (r3900): r3900 does not support 64 bit integer + operations. + +start-sanitize-sky +Wed Apr 1 08:20:31 1998 Frank Ch. Eigler + + * mips.igen (SQC2/LQC2): Make bodies sky-target-only also. + +end-sanitize-sky +start-sanitize-sky +Mon Mar 30 18:41:43 1998 Frank Ch. Eigler + + * interp.c (decode_coproc): Continuing COP2 work. + (cop_[ls]q): Make sky-target-only. + + * sim-main.h (COP_[LS]Q): Make sky-target-only. +end-sanitize-sky +Mon Mar 30 14:46:05 1998 Gavin Koch + + * configure.in (mipstx39*-*-*): Use gencode simulator rather + than igen one. + * configure : Rebuild. + +start-sanitize-sky +Sun Mar 29 17:50:11 Frank Ch. Eigler + + * interp.c (decode_coproc): Added a missing TARGET_SKY check + around COP2 implementation skeleton. + +end-sanitize-sky +start-sanitize-sky +Fri Mar 27 16:19:29 1998 Frank Ch. Eigler + + * Makefile.in (SIM_SKY_OBJS): Replaced sky-vu[01].o with sky-vu.o. + + * interp.c (sim_{load,store}_register): Use new vu[01]_device + static to access VU registers. + (decode_coproc): Added skeleton of sky COP2 (VU) instruction + decoding. Work in progress. + + * mips.igen (LDCzz, SDCzz): Removed *5900 case for this + overlapping/redundant bit pattern. + (LQC2, SQC2): Added *5900 COP2 instruction skeleta. Work in + progress. + + * sim-main.h (status_CU[012]): Added COP[n]-enabled flags for + status register. + + * interp.c (cop_lq, cop_sq): New functions for future 128-bit + access to coprocessor registers. + + * sim-main.h (COP_LQ, COP_SQ): New macro front-ends for above. +end-sanitize-sky +Fri Mar 27 16:15:52 1998 Andrew Cagney + + * configure: Regenerated to track ../common/aclocal.m4 changes. + +Fri Mar 27 15:01:50 1998 Andrew Cagney + + * interp.c (mips_option_handler): Iterate over MAX_NR_PROCESSORS. + +Wed Mar 25 16:44:27 1998 Ian Carmichael + + * configure: Regenerated to track ../common/aclocal.m4 changes. + * config.in: Regenerated to track ../common/aclocal.m4 changes. + Wed Mar 25 12:35:29 1998 Andrew Cagney * configure: Regenerated to track ../common/aclocal.m4 changes. @@ -28,7 +272,6 @@ start-sanitize-sky * interp.c (MEM_SIZE): Increased default sky memory size to 16MB. end-sanitize-sky - * configure.in: Added X11 search, just in case. * configure: Regenerated.