X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fmips%2FChangeLog;h=f48219a5915bcee6f59706ca0cc0aadae2e832db;hb=d85c3a10ae895627d2adb6f446bcf5017f7002d7;hp=b4ee0929ef5aeba1c81a8f8b054e022dc049d17b;hpb=2b193c4ab6472ae6f704c99a1503fe787cbeb7db;p=deliverable%2Fbinutils-gdb.git

diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index b4ee0929ef..f48219a591 100644
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,88 @@
+2006-08-29  Thiemo Seufer  <ths@mips.com>
+            David Ung  <davidu@mips.com>
+
+	* Makefile.in (IGEN_INCLUDE): Add missing includes for m16e.igen and
+	mips3264r2.igen. Add missing dependency rules.
+	* m16e.igen: Support for mips16e save/restore instructions.
+
+2006-06-13  Richard Earnshaw  <rearnsha@arm.com>
+
+	* configure: Regenerated.
+
+2006-06-05  Daniel Jacobowitz  <dan@codesourcery.com>
+
+	* configure: Regenerated.
+
+2006-05-31  Daniel Jacobowitz  <dan@codesourcery.com>
+
+	* configure: Regenerated.
+
+2006-05-15 Chao-ying Fu  <fu@mips.com>
+
+	* dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding instructions.
+
+2006-04-18  Nick Clifton  <nickc@redhat.com>
+
+	* dv-tx3904tmr.c (deliver_tx3904tmr_tick): Add missing break
+	statement.
+
+2006-03-29  Hans-Peter Nilsson  <hp@axis.com>
+
+	* configure: Regenerate.
+
+2005-12-14  Chao-ying Fu  <fu@mips.com>
+
+	* Makefile.in (SIM_OBJS): Add dsp.o.
+	(dsp.o): New dependency.
+	(IGEN_INCLUDE): Add dsp.igen.
+	* configure.ac (mipsisa32r2*-*-*, mipsisa32*-*-*, mipsisa64r2*-*-*,
+	mipsisa64*-*-*): Add dsp to sim_igen_machine.
+	* configure: Regenerate.
+	* mips.igen: Add dsp model and include dsp.igen.
+	(MFHI, MFLO, MTHI, MTLO): Remove mips32, mips32r2, mips64, mips64r2,
+	because these instructions are extended in DSP ASE.
+	* sim-main.h (LAST_EMBED_REGNUM): Change from 89 to 96 because of
+	adding 6 DSP accumulator registers and 1 DSP control register.
+	(AC0LOIDX, AC0HIIDX, AC1LOIDX, AC1HIIDX, AC2LOIDX, AC2HIIDX, AC3LOIDX,
+	AC3HIIDX, DSPLO, DSPHI, DSPCRIDX, DSPCR, DSPCR_POS_SHIFT,
+	DSPCR_POS_MASK, DSPCR_POS_SMASK, DSPCR_SCOUNT_SHIFT, DSPCR_SCOUNT_MASK,
+	DSPCR_SCOUNT_SMASK, DSPCR_CARRY_SHIFT, DSPCR_CARRY_MASK,
+	DSPCR_CARRY_SMASK, DSPCR_CARRY, DSPCR_EFI_SHIFT, DSPCR_EFI_MASK,
+	DSPCR_EFI_SMASK, DSPCR_EFI, DSPCR_OUFLAG_SHIFT, DSPCR_OUFLAG_MASK,
+	DSPCR_OUFLAG_SMASK, DSPCR_OUFLAG4, DSPCR_OUFLAG5, DSPCR_OUFLAG6,
+	DSPCR_OUFLAG7, DSPCR_CCOND_SHIFT, DSPCR_CCOND_MASK,
+	DSPCR_CCOND_SMASK): New define.
+	(DSPLO_REGNUM, DSPHI_REGNUM): New array for DSP accumulators.
+	* dsp.c, dsp.igen: New files for MIPS DSP ASE.
+
+2005-07-08  Ian Lance Taylor  <ian@airs.com>
+
+	* tconfig.in (SIM_QUIET_NAN_NEGATED): Define.
+
+2005-06-16  David Ung  <davidu@mips.com>
+            Nigel Stephens  <nigel@mips.com>
+
+        * mips.igen: New mips16e model and include m16e.igen.
+        (check_u64): Add mips16e tag.
+        * m16e.igen: New file for MIPS16e instructions.
+        * configure.ac (mipsisa32*-*-*, mipsisa32r2*-*-*, mipsisa64*-*-*,
+        mipsisa64r2*-*-*): Change sim_gen to M16, add mips16 and mips16e
+        models.
+        * configure: Regenerate.
+
+2005-05-26  David Ung  <davidu@mips.com>
+ 
+ 	* mips.igen (mips32r2, mips64r2): New ISA models.  Add new model
+	tags to all instructions which are applicable to the new ISAs.
+ 	(do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Add, moved from
+	vr.igen.
+ 	* mips3264r2.igen: New file for MIPS 32/64 revision 2 specific
+ 	instructions. 
+ 	* vr.igen (do_ror, do_dror, ROR, RORV, DROR, DROR32, DRORV): Move
+	to mips.igen.
+ 	* configure.ac (mipsisa32r2*-*-*, mipsisa64r2*-*-*): Add new targets.
+	* configure: Regenerate.
+ 
 2005-03-23  Mark Kettenis  <kettenis@gnu.org>
 
 	* configure: Regenerate.