X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fmips%2FMakefile.in;h=e0e9fafcafeaf718644713a6a6fd75e2cc64094b;hb=06e7837e0fe0681494ebdc4f7aae51ef3f77a5fe;hp=abfb81ad9607999fc0892a046dca9d4ab16ad822;hpb=76969284c3e1cb655141b6e725f4e152d1e66d59;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/mips/Makefile.in b/sim/mips/Makefile.in index abfb81ad96..e0e9fafcaf 100644 --- a/sim/mips/Makefile.in +++ b/sim/mips/Makefile.in @@ -6,23 +6,8 @@ srcdir=@srcdir@ srcroot=$(srcdir)/../../ -SIM_NO_OBJ = - -# start-sanitize-sky -SIM_SKY_OBJS = \ - sky-device.o \ - sky-dma.o \ - sky-engine.o \ - sky-gpuif.o \ - sky-hardware.o \ - sky-libvpe.o \ - sky-pke.o \ - sky-vu.o \ - sky-vu0.o \ - sky-vu1.o \ - sky-gs.o \ - sky-gdb.o -# end-sanitize-sky +# Object files created by various simulator generators. + SIM_IGEN_OBJ = \ support.o \ @@ -30,9 +15,10 @@ SIM_IGEN_OBJ = \ semantics.o \ idecode.o \ icache.o \ - engine.o \ + @mips_igen_engine@ \ irun.o \ + SIM_M16_OBJ = \ m16_support.o \ m16_semantics.o \ @@ -47,6 +33,7 @@ SIM_M16_OBJ = \ itable.o \ m16run.o \ + MIPS_EXTRA_OBJS = @mips_extra_objs@ MIPS_EXTRA_LIBS = @mips_extra_libs@ @@ -54,7 +41,10 @@ SIM_OBJS = \ $(SIM_@sim_gen@_OBJ) \ $(SIM_NEW_COMMON_OBJS) \ $(MIPS_EXTRA_OBJS) \ + cp1.o \ interp.o \ + mdmx.o \ + sim-main.o \ sim-hload.o \ sim-engine.o \ sim-stop.o \ @@ -64,17 +54,7 @@ SIM_OBJS = \ # List of flags to always pass to $(CC). SIM_SUBTARGET=@SIM_SUBTARGET@ - -SIM_NO_CFLAGS = -DWITH_IGEN=0 -SIM_IGEN_CFLAGS = -DWITH_IGEN=1 -SIM_M16_CFLAGS = -DWITH_IGEN=1 - -# FIXME: Hack to find syscall.h? Better support for syscall.h -# is in progress. -SIM_EXTRA_CFLAGS = \ - $(SIM_SUBTARGET) \ - -I$(srcdir)/../../newlib/libc/sys/idt \ - $(SIM_@sim_gen@_CFLAGS) +SIM_EXTRA_CFLAGS = $(SIM_SUBTARGET) SIM_EXTRA_CLEAN = clean-extra @@ -89,55 +69,39 @@ SIM_RUN_OBJS = nrun.o ## COMMON_POST_CONFIG_FRAG -SIM_NO_INTERP = oengine.c -interp.o: $(srcdir)/interp.c config.h sim-main.h $(SIM_@sim_gen@_INTERP) - - - -# -# Old deprecated generator -# - -SIM_NO_ALL = oengine.c - -oengine.c: gencode - ./gencode @SIMCONF@ > tmp-oengine - mv tmp-oengine oengine.c - -gencode: gencode.o getopt.o getopt1.o - $(CC_FOR_BUILD) -o $@ gencode.o getopt.o getopt1.o - -gencode.o: $(srcdir)/gencode.c - $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/gencode.c - -getopt.o: $(srcdir)/../../libiberty/getopt.c - $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/../../libiberty/getopt.c -getopt1.o: $(srcdir)/../../libiberty/getopt1.c - $(CC_FOR_BUILD) -c -g -I${srcroot}/include $(srcdir)/../../libiberty/getopt1.c - +interp.o: $(srcdir)/interp.c config.h sim-main.h itable.h +cp1.o: $(srcdir)/cp1.c config.h sim-main.h +mdmx.o: $(srcdir)/mdmx.c $(srcdir)/sim-main.h ../igen/igen: cd ../igen && $(MAKE) -IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries +IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries # -G trace-all IGEN_INSN=$(srcdir)/mips.igen IGEN_DC=$(srcdir)/mips.dc M16_DC=$(srcdir)/m16.dc IGEN_INCLUDE=\ - $(start-sanitize-r5900) \ - $(srcdir)/r5900.igen \ - $(end-sanitize-r5900) \ - $(start-sanitize-vr5400) \ - $(srcdir)/vr5400.igen \ + $(srcdir)/m16.igen \ $(srcdir)/mdmx.igen \ - $(end-sanitize-vr5400) \ - $(start-sanitize-vr4320) \ - $(srcdir)/vr4320.igen \ - $(end-sanitize-vr4320) \ - $(srcdir)/m16.igen + $(srcdir)/mips3d.igen \ + $(srcdir)/sb1.igen \ + $(srcdir)/tx.igen \ + $(srcdir)/vr.igen \ + +# NB: Since these can be built by a number of generators, care +# must be taken to ensure that they are only dependant on +# one of those generators. +BUILT_SRC_FROM_GEN = \ + itable.h \ + itable.c \ SIM_IGEN_ALL = tmp-igen +SIM_M16_ALL = tmp-m16 + +$(BUILT_SRC_FROM_GEN): $(SIM_@sim_gen@_ALL) + + BUILT_SRC_FROM_IGEN = \ icache.h \ @@ -154,16 +118,6 @@ BUILT_SRC_FROM_IGEN = \ engine.c \ irun.c \ -# NB: Since these can be built by either tmp-igen or tmp-m16 -# they are explicitly marked as being dependant on the -# dependant on the selected generator. -BUILT_SRC_FROM_GEN = \ - itable.h \ - itable.c \ - -$(BUILT_SRC_FROM_GEN): $(SIM_@sim_gen@_ALL) - - $(BUILT_SRC_FROM_IGEN): tmp-igen tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE) @@ -213,15 +167,14 @@ tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE) $(srcdir)/../../move-if-change tmp-irun.c irun.c touch tmp-igen -semantics.o: sim-main.h $(SIM_EXTRA_DEPS) -engine.o: sim-main.h $(SIM_EXTRA_DEPS) -support.o: sim-main.h $(SIM_EXTRA_DEPS) -idecode.o: sim-main.h $(SIM_EXTRA_DEPS) -itable.o: sim-main.h $(SIM_EXTRA_DEPS) +semantics.o: sim-main.h semantics.c $(SIM_EXTRA_DEPS) +engine.o: sim-main.h engine.c $(SIM_EXTRA_DEPS) +support.o: sim-main.h support.c $(SIM_EXTRA_DEPS) +idecode.o: sim-main.h idecode.c $(SIM_EXTRA_DEPS) +itable.o: sim-main.h itable.c $(SIM_EXTRA_DEPS) -SIM_M16_ALL = tmp-m16 BUILT_SRC_FROM_M16 = \ m16_icache.h \ @@ -339,9 +292,9 @@ tmp-m16: $(IGEN_INSN) $(IGEN_DC) ../igen/igen $(IGEN_INCLUDE) clean-extra: - rm -f gencode oengine.c tmp.igen rm -f $(BUILT_SRC_FROM_GEN) rm -f $(BUILT_SRC_FROM_IGEN) rm -f $(BUILT_SRC_FROM_M16) - rm -f tmp-igen - rm -f tmp-m16 + rm -f tmp-* + rm -f m16*.o m32*.o itable*.o +