X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fmips%2Fconfigure.in;h=1ea4901f87cc8ef51ec28ed5c26694a6d8f387f2;hb=4c54fc26ed171989615301442435fa4dd3af9755;hp=adeb32e8477261f7ad499c7945a9fde25fbf6c52;hpb=f872d0d643968c1101bb8c07b252edd54f626da2;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/mips/configure.in b/sim/mips/configure.in index adeb32e847..1ea4901f87 100644 --- a/sim/mips/configure.in +++ b/sim/mips/configure.in @@ -10,25 +10,7 @@ SIM_AC_OPTION_INLINE() SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT) SIM_AC_OPTION_HOSTENDIAN SIM_AC_OPTION_WARNINGS - -# Ensure a reasonable default simulator is constructed: (DEPRECATED) -case "${target}" in -# start-sanitize-tx19 - mipstx19*-*-*) SIMCONF="-mips1 -mcpu=r1900 -mno-fp --warnings";; -# end-sanitize-tx19 -# start-sanitize-tx49 - mips64tx49*-*-*) SIMCONF="-mips3 --warnings -mcpu=r4900";; -# end-sanitize-tx49 -# start-sanitize-r5900 - mips64r59*-*-*) SIMCONF="-mips3 --warnings -mcpu=r5900";; -# end-sanitize-r5900 - mips64vr4100-*-*) SIMCOMF="-mips0 -mcpu=r4100 -mgp64 --warnings" ;; - mips64*-*-*) SIMCONF="-mips0 --warnings";; - mips16*-*-*) SIMCONF="-mips0 --warnings";; - mips*-*-*) SIMCONF="-mips2 --warnings";; - *) SIMCONF="-mips0 --warnings";; -esac -AC_SUBST(SIMCONF) +SIM_AC_OPTION_RESERVED_BITS(1) # DEPRECATED # @@ -37,10 +19,10 @@ AC_SUBST(SIMCONF) # in question. # case "${target}" in -# start-sanitize-tx19 - mipstx19*-*-*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";; -# end-sanitize-tx19 + mips64vr*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1" ;; mips*tx39*) SIM_SUBTARGET="-DSUBTARGET_R3900=1";; + mipsisa32*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";; + mipsisa64*-*-*) SIM_SUBTARGET="-DTARGET_ENABLE_FR=1";; *) SIM_SUBTARGET="";; esac AC_SUBST(SIM_SUBTARGET) @@ -53,14 +35,12 @@ AC_SUBST(SIM_SUBTARGET) mips_endian= default_endian= case "${target}" in -# start-sanitize-tx19 - mipstx19*-*-*) default_endian=BIG_ENDIAN ;; -# end-sanitize-tx19 -# start-sanitize-r5900 - mips64r59*-*-*) mips_endian=LITTLE_ENDIAN ;; -# end-sanitize-r5900 + mips64el*-*-*) mips_endian=LITTLE_ENDIAN ;; + mips64vr*el-*-*) default_endian=LITTLE_ENDIAN ;; mips64*-*-*) default_endian=BIG_ENDIAN ;; mips16*-*-*) default_endian=BIG_ENDIAN ;; + mipsisa32*-*-*) default_endian=BIG_ENDIAN ;; + mipsisa64*-*-*) default_endian=BIG_ENDIAN ;; mips*-*-*) default_endian=BIG_ENDIAN ;; *) default_endian=BIG_ENDIAN ;; esac @@ -73,14 +53,10 @@ SIM_AC_OPTION_ENDIAN($mips_endian,$default_endian) # mips_addr_bitsize= case "${target}" in -# start-sanitize-tx19 - mipstx19*-*-*) mips_bitsize=32 ; mips_msb=31 ;; -# end-sanitize-tx19 -# start-sanitize-r5900 - mips64r59*-*-*) mips_bitsize=64 ; mips_msb=63 ; mips_addr_bitsize=32;; -# end-sanitize-r5900 mips64*-*-*) mips_bitsize=64 ; mips_msb=63 ;; mips16*-*-*) mips_bitsize=64 ; mips_msb=63 ;; + mipsisa32*-*-*) mips_bitsize=32 ; mips_msb=31 ;; + mipsisa64*-*-*) mips_bitsize=64 ; mips_msb=63 ;; mips*-*-*) mips_bitsize=32 ; mips_msb=31 ;; *) mips_bitsize=64 ; mips_msb=63 ;; esac @@ -94,18 +70,14 @@ SIM_AC_OPTION_BITSIZE($mips_bitsize,$mips_msb,$mips_addr_bitsize) mips_fpu=HARDWARE_FLOATING_POINT mips_fpu_bitsize= case "${target}" in -# start-sanitize-tx19 - mipstx19*-*-*) mips_fpu=SOFT_FLOATING_POINT ;; -# end-sanitize-tx19 mips*tx39*) mips_fpu=HARD_FLOATING_POINT mips_fpu_bitsize=32 ;; -# start-sanitize-r5900 - mips64r59*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;; -# end-sanitize-r5900 mips64*-*-*) mips_fpu=HARD_FLOATING_POINT ;; mips16*-*-*) mips_fpu=HARD_FLOATING_POINT ;; - mips*-*-*) mips_fpu=HARD_FLOATING_POINT ;; + mipsisa32*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;; + mipsisa64*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=64 ;; + mips*-*-*) mips_fpu=HARD_FLOATING_POINT ; mips_fpu_bitsize=32 ;; *) mips_fpu=HARD_FLOATING_POINT ;; esac SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize) @@ -116,9 +88,6 @@ SIM_AC_OPTION_FLOAT($mips_fpu,$mips_fpu_bitsize) # Select the level of SMP support # case "${target}" in -# start-sanitize-r5900 - mips64r59*-*-*) mips_smp=1 ;; -# end-sanitize-r5900 *) mips_smp=0 ;; esac SIM_AC_OPTION_SMP($mips_smp) @@ -128,154 +97,319 @@ SIM_AC_OPTION_SMP($mips_smp) # # Select the IGEN architecture # -sim_use_gen=IGEN +sim_gen=IGEN sim_igen_machine="-M mipsIV" sim_m16_machine="-M mips16" sim_igen_filter="32,64,f" sim_m16_filter="16" +sim_mach_default="mips8000" + case "${target}" in -# start-sanitize-tx19 - mipstx19*-*-*) sim_default_gen=M16 - sim_use_gen=M16 - sim_igen_machine="-M tx19" - sim_m16_machine="-M tx19" - sim_igen_filter="32" - sim_m16_filter="16" - ;; -# end-sanitize-tx19 - mipst*tx39*) sim_default_gen=IGEN - sim_use_gen=IGEN + mips*tx39*) sim_gen=IGEN sim_igen_filter="32,f" sim_igen_machine="-M r3900" ;; -# start-sanitize-r5900 - mips64r59*-*-*) sim_default_gen=IGEN - sim_use_gen=IGEN - sim_igen_machine="-M r5900" - ;; -# end-sanitize-r5900 -# start-sanitize-vr4320 - mips64vr4320-*-*) sim_default_gen=IGEN - sim_use_gen=IGEN - sim_igen_machine="-M mipsIV,vr4320 -G gen-multi-sim=vr4320" - ;; -# end-sanitize-vr4320 - mips64vr43*-*-*) sim_default_gen=IGEN - sim_use_gen=IGEN + mips64vr43*-*-*) sim_gen=IGEN sim_igen_machine="-M mipsIV" -# start-sanitize-vr4320 - sim_igen_machine="-M mipsIV,vr4320 -G gen-multi-sim=mipsIV" -# end-sanitize-vr4320 - ;; -# start-sanitize-vr5400 - mips64vr54*-*-*) sim_default_gen=IGEN - sim_use_gen=IGEN - sim_igen_machine="-M vr5000,vr5400 -G gen-multi-sim=vr5400" + sim_mach_default="mips8000" ;; -# end-sanitize-vr5400 - mips64vr5*-*-*) sim_default_gen=IGEN - sim_use_gen=IGEN + mips64vr5*-*-*) sim_gen=IGEN sim_igen_machine="-M vr5000" -# start-sanitize-vr5400 - sim_igen_machine="-M vr5000,vr5400 -G gen-multi-sim=vr5000" -# end-sanitize-vr5400 + sim_mach_default="mips5000" ;; -mips64vr4100-*-*) echo "NOTE: mips64vr4100 still uses gencode" - sim_default_gen=M16 - sim_igen_machine="-M tx19" - sim_m16_machine="-M tx19" - sim_igen_filter = "32,64,f" - sim_m16_filter = "16" - sim_use_gen=NO - ;; - - mips64*-*-*) sim_default_gen=IGEN + mips64vr41*) sim_gen=M16 + sim_igen_machine="-M vr4100" + sim_m16_machine="-M vr4100" sim_igen_filter="32,64,f" - sim_use_gen=IGEN + sim_m16_filter="16" + sim_mach_default="mips4100" + ;; + mips64vr-*-* | mips64vrel-*-*) + sim_gen=MULTI + sim_multi_configs="\ + vr4100:mipsIII,mips16,vr4100:32,64:mips4100,mips4111\ + vr4120:mipsIII,mips16,vr4120:32,64:mips4120\ + vr5000:mipsIV:32,64,f:mips4300,mips5000\ + vr5400:mipsIV,vr5400:32,64,f:mips5400\ + vr5500:mipsIV,vr5500:32,64,f:mips5500" + sim_multi_default=mips5000 ;; - mips16*-*-*) sim_default_gen=M16 + mips64*-*-*) sim_igen_filter="32,64,f" + sim_gen=IGEN + ;; + mips16*-*-*) sim_gen=M16 sim_igen_filter="32,64,f" sim_m16_filter="16" - sim_use_igen=NO ;; - mips*-*-*) sim_default_gen=IGEN + mipsisa32*-*-*) sim_gen=IGEN + sim_igen_machine="-M mips32" + sim_igen_filter="32,f" + sim_mach_default="mipsisa32" + ;; + mipsisa64sb1*-*-*) sim_gen=IGEN + sim_igen_machine="-M mips64,sb1" + sim_igen_filter="32,64,f" + sim_mach_default="mips_sb1" + ;; + mipsisa64*-*-*) sim_gen=IGEN + sim_igen_machine="-M mips64,mips3d" + sim_igen_filter="32,64,f" + sim_mach_default="mipsisa64" + ;; + mips*lsi*) sim_gen=M16 + sim_igen_machine="-M mipsIII,mips16" + sim_m16_machine="-M mips16,mipsIII" + sim_igen_filter="32,f" + sim_m16_filter="16" + sim_mach_default="mips4000" + ;; + mips*-*-*) sim_gen=IGEN sim_igen_filter="32,f" - sim_use_gen=IGEN ;; esac + +# The MULTI generator can combine several simulation engines into one. +# executable. A configuration which uses the MULTI should set two +# variables: ${sim_multi_configs} and ${sim_multi_default}. +# +# ${sim_multi_configs} is the list of engines to build. Each +# space-separated entry has the form NAME:MACHINE:FILTER:BFDMACHS, +# where: +# +# - NAME is a C-compatible prefix for the engine, +# - MACHINE is a -M argument, +# - FILTER is a -F argument, and +# - BFDMACHS is a comma-separated list of bfd machines that the +# simulator can run. +# +# Each entry will have a separate simulation engine whose prefix is +# m32. If the machine list includes "mips16", there will also +# be a mips16 engine, prefix m16. The mips16 engine will be +# generated using the same machine list as the 32-bit version, +# but the filter will be "16" instead of FILTER. +# +# The simulator compares the bfd mach against BFDMACHS to decide +# which engine to use. Entries in BFDMACHS should be bfd_mach +# values with "bfd_mach_" removed. ${sim_multi_default} says +# which entry should be the default. +if test ${sim_gen} = MULTI; then + + # Simple sanity check. + if test -z "${sim_multi_configs}" || test -z "${sim_multi_default}"; then + AC_MSG_ERROR(Error in configure.in: MULTI simulator not set up correctly) + fi + + # Start in a known state. + rm -f multi-include.h multi-run.c + sim_multi_flags= + sim_multi_src= + sim_multi_obj=multi-run.o + sim_multi_igen_configs= + sim_seen_default=no + + cat << __EOF__ > multi-run.c +/* Main entry point for MULTI simulators. + Copyright (C) 2003 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 2 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + + -- + + This file was generated by sim/mips/configure. */ + +#include "sim-main.h" +#include "multi-include.h" + +#define SD sd +#define CPU cpu + +void +sim_engine_run (SIM_DESC sd, + int next_cpu_nr, + int nr_cpus, + int signal) /* ignore */ +{ + int mach; + + if (STATE_ARCHITECTURE (sd) == NULL) + mach = bfd_mach_${sim_multi_default}; + else + mach = STATE_ARCHITECTURE (SD)->mach; + + switch (mach) + { +__EOF__ + + for fc in ${sim_multi_configs}; do + + # Split up the entry. ${c} contains the first three elements. + # Note: outer sqaure brackets are m4 quotes. + c=`echo ${fc} | sed ['s/:[^:]*$//']` + bfdmachs=`echo ${fc} | sed 's/.*://'` + name=`echo ${c} | sed 's/:.*//'` + machine=`echo ${c} | sed 's/.*:\(.*\):.*/\1/'` + filter=`echo ${c} | sed 's/.*://'` + + # Build the following lists: + # + # sim_multi_flags: all -M and -F flags used by the simulator + # sim_multi_src: all makefile-generated source files + # sim_multi_obj: the objects for ${sim_multi_src} + # sim_multi_igen_configs: igen configuration strings. + # + # Each entry in ${sim_multi_igen_configs} is a prefix (m32 + # or m16) followed by the NAME, MACHINE and FILTER part of + # the ${sim_multi_configs} entry. + sim_multi_flags="${sim_multi_flags} -F ${filter} -M ${machine}" + + # Check whether mips16 handling is needed. + case ${c} in + *:*mips16*:*) + # Run igen twice, once for normal mode and once for mips16. + ws="m32 m16" + + # The top-level function for the mips16 simulator is + # in a file m16${name}_run.c, generated by the + # tmp-run-multi Makefile rule. + sim_multi_src="${sim_multi_src} m16${name}_run.c" + sim_multi_obj="${sim_multi_obj} m16${name}_run.o" + sim_multi_flags="${sim_multi_flags} -F 16" + ;; + *) + ws=m32 + ;; + esac + + # Now add the list of igen-generated files to ${sim_multi_src} + # and ${sim_multi_obj}. + for w in ${ws}; do + for base in engine icache idecode model semantics support; do + sim_multi_src="${sim_multi_src} ${w}${name}_${base}.c" + sim_multi_src="${sim_multi_src} ${w}${name}_${base}.h" + sim_multi_obj="${sim_multi_obj} ${w}${name}_${base}.o" + done + sim_multi_igen_configs="${sim_multi_igen_configs} ${w}${c}" + done + + # Add an include for the engine.h file. This file declares the + # top-level foo_engine_run() function. + echo "#include \"${w}${name}_engine.h\"" >> multi-include.h + + # Add case statements for this engine to sim_engine_run(). + for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do + echo " case bfd_mach_${mach}:" >> multi-run.c + if test ${mach} = ${sim_multi_default}; then + echo " default:" >> multi-run.c + sim_seen_default=yes + fi + done + echo " ${w}${name}_engine_run (sd, next_cpu_nr, nr_cpus, signal);" \ + >> multi-run.c + echo " break;" >> multi-run.c + done + + # Check whether we added a 'default:' label. + if test ${sim_seen_default} = no; then + AC_MSG_ERROR(Error in configure.in: \${sim_multi_configs} doesn't have an entry for \${sim_multi_default}) + fi + + cat << __EOF__ >> multi-run.c + } +} + +int +mips_mach_multi (SIM_DESC sd) +{ + if (STATE_ARCHITECTURE (sd) == NULL) + return bfd_mach_${sim_multi_default}; + + switch (STATE_ARCHITECTURE (SD)->mach) + { +__EOF__ + + # Add case statements for this engine to mips_mach_multi(). + for fc in ${sim_multi_configs}; do + + # Split up the entry. ${c} contains the first three elements. + # Note: outer sqaure brackets are m4 quotes. + c=`echo ${fc} | sed ['s/:[^:]*$//']` + bfdmachs=`echo ${fc} | sed 's/.*://'` + + for mach in `echo ${bfdmachs} | sed 's/,/ /g'`; do + echo " case bfd_mach_${mach}:" >> multi-run.c + done + done + + cat << __EOF__ >> multi-run.c + return (STATE_ARCHITECTURE (SD)->mach); + default: + return bfd_mach_${sim_multi_default}; + } +} +__EOF__ + + SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_MULTI" +else + # For clean-extra + sim_multi_src=doesnt-exist.c + + if test x"${sim_mach_default}" = x""; then + AC_MSG_ERROR(Error in configure.in: \${sim_mach_default} not defined) + fi + SIM_SUBTARGET="$SIM_SUBTARGET -DMIPS_MACH_DEFAULT=bfd_mach_${sim_mach_default}" +fi sim_igen_flags="-F ${sim_igen_filter} ${sim_igen_machine} ${sim_igen_smp}" sim_m16_flags=" -F ${sim_m16_filter} ${sim_m16_machine} ${sim_igen_smp}" AC_SUBST(sim_igen_flags) AC_SUBST(sim_m16_flags) - +AC_SUBST(sim_gen) +AC_SUBST(sim_multi_flags) +AC_SUBST(sim_multi_igen_configs) +AC_SUBST(sim_multi_src) +AC_SUBST(sim_multi_obj) # -# Enable igen +# Add simulated hardware devices # -AC_ARG_ENABLE(sim-igen, -[ --enable-sim-igen=opts Enable IGEN simulator], -[case "${enableval}" in - yes) sim_gen="${sim_default_gen}";; - no) sim_gen=NO;; - 16) sim_gen=M16;; - *) AC_MSG_ERROR("Unknown value $enableval passed to --enable-sim-igen"); sim_gen="";; -esac -if test x"$silent" != x"yes" && test x"$sim_gen" != x""; then - echo "Setting sim_igen = $sim_gen" 6>&1 -fi],[sim_gen="${sim_use_gen}"])dnl -AC_SUBST(sim_gen) - - +hw_enabled=no case "${target}" in -# start-sanitize-sky - mips64r59*-sky-*) mips_extra_objs='$(SIM_SKY_OBJS)' ; - SIM_SUBTARGET="-DTARGET_SKY -DWITH_DEVICES=1 -DDEVICE_INIT=1";; - -# end-sanitize-sky - *) mips_extra_objs="" ;; + mips*tx39*) + hw_enabled=yes + hw_extra_devices="tx3904cpu tx3904irc tx3904tmr tx3904sio" + mips_extra_objs="dv-sockser.o" + SIM_SUBTARGET="$SIM_SUBTARGET -DTARGET_TX3904=1" + ;; + *) + mips_extra_objs="" + ;; esac +SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices) AC_SUBST(mips_extra_objs) - -# start-sanitize-tx3904 -# -# Add simulated hardware devices -# -hw_enabled=no +# Choose simulator engine case "${target}" in - mips*tx39*) hw_enabled=yes ; hw_extra_devices="tx3904cpu tx3904irc" ;; - *) ;; + *) mips_igen_engine="engine.o" + ;; esac -SIM_AC_OPTION_HARDWARE($hw_enabled,$hw_devices,$hw_extra_devices) -# end-sanitize-tx3904 +AC_SUBST(mips_igen_engine) AC_PATH_X mips_extra_libs="" -# start-sanitize-sky -# Enable GPU2 library -AC_ARG_WITH(sim-gpu2, -[ --with-sim-gpu2=path Use GPU2 library under given directory], -[if test -d "${withval}" -then - SIM_SUBTARGET="${SIM_SUBTARGET} -DSKY_GPU2 -I${withval}/include" - mips_extra_libs="-L${withval}/lib -lgpu2 -L${x_libraries} -lX11" -else - AC_MSG_ERROR("Directory ${withval} does not exist."); -fi])dnl -# Enable target accurate FP library -AC_ARG_WITH(sim-funit, -[ --with-sim-funit=path Use target FP library under given directory], -[if test -d "${withval}" -then - SIM_SUBTARGET="${SIM_SUBTARGET} -DSKY_FUNIT -I${withval}/include" - mips_extra_libs="${mips_extra_libs} -L${withval}/lib -lfunit" -else - AC_MSG_ERROR("Directory ${withval} does not exist."); -fi])dnl -# end-sanitize-sky AC_SUBST(mips_extra_libs) AC_CHECK_HEADERS(string.h strings.h stdlib.h stdlib.h)