X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fmips%2Fm16.igen;h=74adacdbf5f242ffd56183defcfae615237f0b88;hb=50d036364fb2a71b3ac9a0b0cdbe58296832a1b2;hp=9b36ff96e9d1d97119aee890e1dd707463d637cf;hpb=27e232885db363fb545fd2f450e72d929e59b8f6;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/mips/m16.igen b/sim/mips/m16.igen index 9b36ff96e9..74adacdbf5 100644 --- a/sim/mips/m16.igen +++ b/sim/mips/m16.igen @@ -614,7 +614,7 @@ 11101,3.RX,3.RY,01010:RR:16::CMP -"sltiu r, r" +"cmp r, r" *mips16: *vr4100: { @@ -623,7 +623,7 @@ 01110,3.RX,8.IMMED:RI:16::CMPI -"sltiu r, " +"cmpi r, " *mips16: *vr4100: { @@ -1075,6 +1075,10 @@ 011101,26.IMMED:JALX:32::JALX32 "jalx " +*mips32: +*mips64: +*mips32r2: +*mips64r2: *mips16: *vr4100: { @@ -1228,9 +1232,5 @@ *mips16: *vr4100: { - if (STATE & simDELAYSLOT) - PC = cia - 2; /* reference the branch instruction */ - else - PC = cia; - sim_engine_halt (SD, CPU, NULL, cia, sim_stopped, SIM_SIGTRAP); + do_break16 (SD_, instruction_0); }