X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fmoxie%2FChangeLog;h=d7cd6636f1ae78b66f0f50a730bccc34f292e905;hb=0dc73ef7c304e6ffc9ce43b2131c77553a74e1d4;hp=785c26e57c452a21455607b72b5b3ac5ea1473e8;hpb=20cc97536046f8aa883c3fba16aa1c9a2762f183;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/moxie/ChangeLog b/sim/moxie/ChangeLog index 785c26e57c..d7cd6636f1 100644 --- a/sim/moxie/ChangeLog +++ b/sim/moxie/ChangeLog @@ -1,3 +1,126 @@ +2016-01-10 Mike Frysinger + + * configure: Regenerate. + +2016-01-10 Mike Frysinger + + * configure: Regenerate. + * Makefile.in (SIM_CFLAGS): Rename to ... + (SIM_EXTRA_CFLAGS): ... this. + +2016-01-09 Mike Frysinger + + * config.in, configure: Regenerate. + +2016-01-06 Mike Frysinger + + * interp.c (sim_open): Mark argv const. + (sim_create_inferior): Mark argv and env const. + +2016-01-04 Mike Frysinger + + * configure: Regenerate. + +2016-01-03 Mike Frysinger + + * interp.c (sim_open): Update sim_parse_args comment. + +2016-01-03 Mike Frysinger + + * configure.ac (SIM_AC_OPTION_HOSTENDIAN): Delete. + * configure: Regenerate. + +2016-01-02 Mike Frysinger + + * configure.ac (SIM_AC_OPTION_ENDIAN): Change BIG_ENDIAN to BIG. + * configure: Regenerate. + +2015-12-30 Mike Frysinger + + * wrapper.c (sim_store_register): Rename to ... + (moxie_reg_store): ... this. + (sim_fetch_register): Rename to ... + (moxie_reg_fetch): ... this. + (sim_open): Call CPU_REG_FETCH/CPU_REG_STORE. + +2015-12-27 Mike Frysinger + + * Makefile.in (SIM_OBJS): Delete sim-hload.o. + +2015-12-26 Mike Frysinger + + * config.in, configure: Regenerate. + +2015-11-15 Mike Frysinger + + * Makefile.in (SIM_OBJS): Delete sim-reason.o and sim-stop.o. + +2015-11-14 Mike Frysinger + + * interp.c (sim_close): Delete. + +2015-10-11 Mike Frysinger + + PR sim/18273 + * interp.c (load_dtb): Close open file in error path. + +2015-06-23 Mike Frysinger + + * configure: Regenerate. + +2015-06-12 Mike Frysinger + + * configure: Regenerate. + +2015-06-12 Mike Frysinger + + * configure: Regenerate. + +2015-06-12 Mike Frysinger + + * interp.c (tracefile, tracing): Delete. + (MOXIE_TRACE_INSN): Call TRACE_INSN directly. + +2015-06-12 Mike Frysinger + + * interp.c (TRACE): Rename to ... + (MOXIE_TRACE_INSN): ... this. + (sim_engine_run): Change TRACE to MOXIE_TRACE_INSN. + +2015-04-18 Mike Frysinger + + * sim-main.h (SIM_CPU): Delete. + +2015-04-18 Mike Frysinger + + * sim-main.h (sim_cia): Delete. + +2015-04-17 Mike Frysinger + + * interp.c (wbat, wsat, wlat, rsat, rbat, rlat, sim_engine_run): + Change CIA_GET to CPU_PC_GET. + * sim-main.h (CIA_GET, CIA_SET): Delete. + +2015-04-16 Mike Frysinger + + * interp.c (moxie_pc_get, moxie_pc_set): New functions. + (sim_open): Declare new local var i. Call CPU_PC_FETCH & + CPU_PC_STORE for all cpus. + * sim-main.h (SIM_CPU): New typedef. + +2015-04-15 Mike Frysinger + + * Makefile.in (SIM_OBJS): Delete sim-cpu.o. + * sim-main.h (STATE_CPU): Delete. + +2015-04-13 Mike Frysinger + + * configure: Regenerate. + +2015-04-06 Mike Frysinger + + * Makefile.in (SIM_OBJS): Delete sim-engine.o and sim-hrw.o. + 2015-04-05 Mike Frysinger * Makefile.in (SIM_OBJS): Add sim-resume.o. @@ -153,7 +276,7 @@ 2012-09-07 Anthony Green * interp.c (sim_resume): Branches are now relative to the - address of the instruction following the branch. + address of the instruction following the branch. 2012-06-17 Mike Frysinger