X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fppc%2Fppc-instructions;h=1a2e51afaf2a7bf79c501a61016b67487fcd5767;hb=00923338dec84505addaf9cdeca2e9c844757824;hp=9553b716616ccf90f1a105042412a38fe0ee59ba;hpb=290ad14a9dd688a94344e1c21e681e2e8d01b0f1;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/ppc/ppc-instructions b/sim/ppc/ppc-instructions index 9553b71661..1a2e51afaf 100644 --- a/sim/ppc/ppc-instructions +++ b/sim/ppc/ppc-instructions @@ -1,7 +1,7 @@ # # This file is part of the program psim. # -# Copyright (C) 1994-1995, Andrew Cagney +# Copyright 1994, 1995, 1996, 1997, 2003, 2004 Andrew Cagney # # -- # @@ -21,7 +21,7 @@ # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or +# the Free Software Foundation; either version 3 of the License, or # (at your option) any later version. # # This program is distributed in the hope that it will be useful, @@ -30,41 +30,55 @@ # GNU General Public License for more details. # # You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# along with this program; if not, see . # -# -- -# -# -# Fields: -# -# 1 Instruction format as a `start-bit,content' pairs. -# the content is one of a digit, field name or `/' (aka.0) -# -# 2 Format specifier -# -# 3 Flags: 64 - 64bit only -# f - floating point enabled required -# -# 4 short name -# -# 5 Description -# -# -# For flags marked 'model', the fields are interpreted as follows: -# -# 1 Not used -# -# 2 Not used -# -# 3 "macro" -# -# 4 String name for model -# -# 5 Specific CPU model, must be an identifier -# -# 6 Comma separated list of functional units +:cache::::RA:RA: +:cache:::signed_word *:rA:RA:(cpu_registers(processor)->gpr + RA) +:cache:::unsigned32:RA_BITMASK:RA:(1 << RA) +:compute:::int:RA_is_0:RA:(RA == 0) +:cache::::RT:RT: +:cache:::signed_word *:rT:RT:(cpu_registers(processor)->gpr + RT) +:cache:::unsigned32:RT_BITMASK:RT:(1 << RT) +:cache::::RS:RS: +:cache:::signed_word *:rS:RS:(cpu_registers(processor)->gpr + RS) +:cache:::unsigned32:RS_BITMASK:RS:(1 << RS) +:cache::::RB:RB: +:cache:::signed_word *:rB:RB:(cpu_registers(processor)->gpr + RB) +:cache:::unsigned32:RB_BITMASK:RB:(1 << RB) +:scratch::::FRA:FRA: +:cache:::unsigned64 *:frA:FRA:(cpu_registers(processor)->fpr + FRA) +:cache:::unsigned32:FRA_BITMASK:FRA:(1 << FRA) +:scratch::::FRB:FRB: +:cache:::unsigned64 *:frB:FRB:(cpu_registers(processor)->fpr + FRB) +:cache:::unsigned32:FRB_BITMASK:FRB:(1 << FRB) +:scratch::::FRC:FRC: +:cache:::unsigned64 *:frC:FRC:(cpu_registers(processor)->fpr + FRC) +:cache:::unsigned32:FRC_BITMASK:FRC:(1 << FRC) +:scratch::::FRS:FRS: +:cache:::unsigned64 *:frS:FRS:(cpu_registers(processor)->fpr + FRS) +:cache:::unsigned32:FRS_BITMASK:FRS:(1 << FRS) +:scratch::::FRT:FRT: +:cache:::unsigned64 *:frT:FRT:(cpu_registers(processor)->fpr + FRT) +:cache:::unsigned32:FRT_BITMASK:FRT:(1 << FRT) +:cache:::unsigned_word:EXTS_SI:SI:((signed_word)(signed16)instruction) +:scratch::::BI:BI: +:cache::::BIT32_BI:BI:BIT32(BI) +:cache::::BF:BF: +:cache:::unsigned32:BF_BITMASK:BF:(1 << BF) +:scratch::::BA:BA: +:cache::::BIT32_BA:BA:BIT32(BA) +:cache:::unsigned32:BA_BITMASK:BA:(1 << BA) +:scratch::::BB:BB: +:cache::::BIT32_BB:BB:BIT32(BB) +:cache:::unsigned32:BB_BITMASK:BB:(1 << BB) +:cache::::BT:BT: +:cache:::unsigned32:BT_BITMASK:BT:(1 << BT) +:cache:::unsigned_word:EXTS_BD_0b00:BD:(((signed_word)(signed16)instruction) & ~3) +:cache:::unsigned_word:EXTS_LI_0b00:LI:((((signed_word)(signed32)(instruction << 6)) >> 6) & ~0x3) +:cache:::unsigned_word:EXTS_D:D:((signed_word)(signed16)(instruction)) +:cache:::unsigned_word:EXTS_DS_0b00:DS:(((signed_word)(signed16)instruction) & ~0x3) +#:compute:::int:SPR_is_256:SPR:(SPR == 256) # PowerPC models ::model:604:ppc604: PPC_UNIT_BAD, PPC_UNIT_BAD, 1, 1, 0 @@ -78,68 +92,68 @@ do { \ if (CURRENT_MODEL_ISSUE > 0) { \ if (RC) \ - ppc_insn_int(my_index, cpu_model(processor), OUT_MASK, IN_MASK); \ + ppc_insn_int_cr(MY_INDEX, cpu_model(processor), OUT_MASK, IN_MASK, 1 << 0); \ else \ - ppc_insn_int_cr(my_index, cpu_model(processor), OUT_MASK, IN_MASK, 1 << 0); \ + ppc_insn_int(MY_INDEX, cpu_model(processor), OUT_MASK, IN_MASK); \ } \ } while (0) #define PPC_INSN_INT_CR(OUT_MASK, IN_MASK, CR_MASK) \ do { \ if (CURRENT_MODEL_ISSUE > 0) \ - ppc_insn_int_cr(my_index, cpu_model(processor), OUT_MASK, IN_MASK, CR_MASK); \ + ppc_insn_int_cr(MY_INDEX, cpu_model(processor), OUT_MASK, IN_MASK, CR_MASK); \ } while (0) #define PPC_INSN_CR(OUT_MASK, IN_MASK) \ do { \ if (CURRENT_MODEL_ISSUE > 0) \ - ppc_insn_cr(my_index, cpu_model(processor), OUT_MASK, IN_MASK); \ + ppc_insn_cr(MY_INDEX, cpu_model(processor), OUT_MASK, IN_MASK); \ } while (0) #define PPC_INSN_FLOAT(OUT_MASK, IN_MASK, RC) \ do { \ if (CURRENT_MODEL_ISSUE > 0) { \ if (RC) \ - ppc_insn_float(my_index, cpu_model(processor), OUT_MASK, IN_MASK); \ + ppc_insn_float(MY_INDEX, cpu_model(processor), OUT_MASK, IN_MASK); \ else \ - ppc_insn_float_cr(my_index, cpu_model(processor), OUT_MASK, IN_MASK, 1 << 0); \ + ppc_insn_float_cr(MY_INDEX, cpu_model(processor), OUT_MASK, IN_MASK, 1 << 0); \ } \ } while (0) #define PPC_INSN_FLOAT_CR(OUT_MASK, IN_MASK, CR_MASK) \ do { \ if (CURRENT_MODEL_ISSUE > 0) \ - ppc_insn_float_cr(my_index, cpu_model(processor), OUT_MASK, IN_MASK, CR_MASK); \ + ppc_insn_float_cr(MY_INDEX, cpu_model(processor), OUT_MASK, IN_MASK, CR_MASK); \ } while (0) #define PPC_INSN_INT_FLOAT(OUT_INT_MASK, OUT_FP_MASK, IN_INT_MASK, IN_FP_MASK) \ do { \ if (CURRENT_MODEL_ISSUE > 0) \ - ppc_insn_int_float(my_index, cpu_model(processor), OUT_INT_MASK, OUT_FP_MASK, IN_INT_MASK, IN_FP_MASK); \ + ppc_insn_int_float(MY_INDEX, cpu_model(processor), OUT_INT_MASK, OUT_FP_MASK, IN_INT_MASK, IN_FP_MASK); \ } while (0) #define PPC_INSN_FROM_SPR(INT_MASK, SPR) \ do { \ if (CURRENT_MODEL_ISSUE > 0) \ - ppc_insn_from_spr(my_index, cpu_model(processor), INT_MASK, SPR); \ + ppc_insn_from_spr(MY_INDEX, cpu_model(processor), INT_MASK, SPR); \ } while (0) #define PPC_INSN_TO_SPR(INT_MASK, SPR) \ do { \ if (CURRENT_MODEL_ISSUE > 0) \ - ppc_insn_to_spr(my_index, cpu_model(processor), INT_MASK, SPR); \ + ppc_insn_to_spr(MY_INDEX, cpu_model(processor), INT_MASK, SPR); \ } while (0) #define PPC_INSN_MFCR(INT_MASK) \ do { \ if (CURRENT_MODEL_ISSUE > 0) \ - ppc_insn_mfcr(my_index, cpu_model(processor), INT_MASK); \ + ppc_insn_mfcr(MY_INDEX, cpu_model(processor), INT_MASK); \ } while (0) #define PPC_INSN_MTCR(INT_MASK, FXM) \ do { \ if (CURRENT_MODEL_ISSUE > 0) \ - ppc_insn_mtcr(my_index, cpu_model(processor), INT_MASK, FXM); \ + ppc_insn_mtcr(MY_INDEX, cpu_model(processor), INT_MASK, FXM); \ } while (0) ::model-data::: @@ -183,11 +197,13 @@ unsigned32 fp_busy; /* floating point registers that are busy */ unsigned32 cr_fpscr_busy; /* CR/FPSCR registers that are busy */ signed16 spr_busy; /* SPR register that is busy or PPC_NO_SPR */ + unsigned32 vr_busy; /* AltiVec registers that are busy */ + signed16 vscr_busy; /* AltiVec status register busy */ signed16 issue; /* # of cycles until unit can accept another insn */ signed16 done; /* # of cycles until insn is done */ signed16 nr_writebacks; /* # of registers this unit writes back */ }; - + /* Structure to hold the current state information for the simulated CPU model */ struct _model_data { cpu *processor; /* point back to processor */ @@ -213,10 +229,12 @@ unsigned32 fp_busy; /* floating point registers that are busy */ unsigned32 cr_fpscr_busy; /* CR/FPSCR registers that are busy */ unsigned8 spr_busy[nr_of_sprs]; /* SPR registers that are busy */ + unsigned32 vr_busy; /* AltiVec registers that are busy */ + unsigned8 vscr_busy; /* AltiVec SC register busy */ unsigned8 busy[nr_ppc_function_units]; /* whether a function is busy or not */ }; - STATIC_MODEL const char *const ppc_function_unit_name[ (int)nr_ppc_function_units ] = { + static const char *const ppc_function_unit_name[ (int)nr_ppc_function_units ] = { "unknown functional unit instruction", "integer functional unit instruction", "system register functional unit instruction", @@ -228,7 +246,7 @@ "branch functional unit instruction", }; - STATIC_MODEL const char *const ppc_branch_conditional_name[32] = { + static const char *const ppc_branch_conditional_name[32] = { "branch if --CTR != 0 and condition is FALSE", /* 0000y */ "branch if --CTR != 0 and condition is FALSE, reverse branch likely", "branch if --CTR == 0 and condition is FALSE", /* 0001y */ @@ -263,7 +281,7 @@ "branch always (ignored bits 1,4,5 set to 1)", }; - STATIC_MODEL const char *const ppc_nr_mtcrf_crs[9] = { + static const char *const ppc_nr_mtcrf_crs[9] = { "mtcrf moving 0 CRs", "mtcrf moving 1 CR", "mtcrf moving 2 CRs", @@ -305,6 +323,15 @@ void::model-static::model_trace_release:model_data *model_ptr, model_busy *busy } if (busy->spr_busy != PPC_NO_SPR) TRACE(trace_model, ("Register %s is now available.\n", spr_name(busy->spr_busy))); + if (busy->vr_busy) { + for(i = 0; i < 32; i++) { + if (((1 << i) & busy->vr_busy) != 0) { + TRACE(trace_model, ("Register v%d is now available.\n", i)); + } + } + } + if (busy->vscr_busy) + TRACE(trace_model, ("VSCR Register is now available.\n", spr_name(busy->spr_busy))); # Trace making registers busy void::model-static::model_trace_make_busy:model_data *model_ptr, unsigned32 int_mask, unsigned32 fp_mask, unsigned32 cr_mask @@ -383,6 +410,8 @@ void::model-internal::model_new_cycle:model_data *model_ptr model_ptr->cr_fpscr_busy &= ~cur_busy->cr_fpscr_busy; if (cur_busy->spr_busy != PPC_NO_SPR) model_ptr->spr_busy[cur_busy->spr_busy] = 0; + model_ptr->vr_busy &= ~cur_busy->vr_busy; + model_ptr->vscr_busy = ~cur_busy->vscr_busy; if (WITH_TRACE && ppc_trace[trace_model]) model_trace_release(model_ptr, cur_busy); @@ -439,6 +468,8 @@ model_busy *::model-internal::model_make_busy:model_data *model_ptr, ppc_functio busy->fp_busy = 0; busy->cr_fpscr_busy = 0; busy->nr_writebacks = 0; + busy->vr_busy = 0; + busy->vscr_busy = 0; } busy->unit = unit; @@ -783,6 +814,15 @@ void::model-function::model_halt:model_data *model_ptr while (model_ptr->busy_head.next) model_new_cycle(model_ptr); +unsigned_word::model-function::model_get_number_of_stalls:model_data *model_ptr + return (model_ptr->nr_stalls_data + + model_ptr->nr_stalls_unit + + model_ptr->nr_stalls_serialize + + model_ptr->nr_stalls_writeback); + +unsigned_word::model-function::model_get_number_of_cycles:model_data *model_ptr + return (model_ptr->nr_cycles); + model_print *::model-function::model_mon_info:model_data *model_ptr model_print *head; model_print *tail; @@ -828,8 +868,8 @@ model_print *::model-function::model_mon_info:model_data *model_ptr tail = tail->next; tail->count = model_ptr->nr_stalls_writeback; tail->name = ""; - tail->suffix_plural = "times a writeback slot was unavilable"; - tail->suffix_singular = "time a writeback was unavilable"; + tail->suffix_plural = "times a write-back slot was unavailable"; + tail->suffix_singular = "time a writeback was unavailable"; } if (model_ptr->nr_branches) { @@ -942,7 +982,6 @@ void::model-function::model_branch_predict:model_data *model_ptr, int success ::internal::illegal program_interrupt(processor, cia, illegal_instruction_program_interrupt); - return 0; # The following (floating point unavailable) instruction is `known' by gen @@ -950,7 +989,6 @@ void::model-function::model_branch_predict:model_data *model_ptr, int success # executed but floating point is make unavailable by the MSR ::internal::floating_point_unavailable floating_point_unavailable_interrupt(processor, cia); - return 0; # @@ -1134,59 +1172,60 @@ void::function::convert_to_integer:cpu *processor, unsigned_word cia, unsigned64 int rbit = 0; int xbit = 0; int sign = EXTRACTED64(frb, 0, 0); - if (EXTRACTED64(frb, 1, 11) == 2047 && EXTRACTED64(frb, 12, 63) == 0) - goto Infinity_Operand; - if (EXTRACTED64(frb, 1, 11) == 2047 && EXTRACTED64(frb, 12, 12) == 0) - goto SNaN_Operand; - if (EXTRACTED64(frb, 1, 11) == 2047 && EXTRACTED64(frb, 12, 12) == 1) - goto QNaN_Operand; - if (EXTRACTED64(frb, 1, 11) > 1086) goto Large_Operand; - if (EXTRACTED64(frb, 1, 11) > 0) exp = EXTRACTED64(frb, 1, 11) - 1023; - if (EXTRACTED64(frb, 1, 11) == 0) exp = -1022; - if (EXTRACTED64(frb, 1, 11) > 0) { /* normal */ - frac = BIT64(1) | INSERTED64(EXTRACTED64(frb, 12, 63), 2, 53); - frac64 = 0; - } - if (EXTRACTED64(frb, 1, 11) == 0) { /* denorm */ - frac = INSERTED64(EXTRACTED64(frb, 12, 63), 2, 53); - frac64 = 0; - } - gbit = 0, rbit = 0, xbit = 0; - for (i = 1; i <= 63 - exp; i++) { - xbit = rbit | xbit; - rbit = gbit; - gbit = frac64; - frac64 = EXTRACTED64(frac, 63, 63); - frac = INSERTED64(EXTRACTED64(frac, 0, 62), 1, 63); - } - Round_Integer(processor, sign, &frac, &frac64, gbit, rbit, xbit, round_mode); - if (sign == 1) { /* frac[0:64] = ~frac[0:64] + 1 */ - frac = ~frac; - frac64 ^= 1; - frac += (frac64 ? 1 : 0); - frac64 = (frac64 + 1) & 0x1; - } - if (tgt_precision == 32 /* can ignore frac64 in compare */ - && (signed64)frac > (signed64)MASK64(33+1, 63)/*2^31-1 >>1*/) - goto Large_Operand; - if (tgt_precision == 64 /* can ignore frac64 in compare */ - && (signed64)frac > (signed64)MASK64(1+1, 63)/*2^63-1 >>1*/) - goto Large_Operand; - if (tgt_precision == 32 /* can ignore frac64 in compare */ - && (signed64)frac < (signed64)MASK64(0, 32+1)/*-2^31 >>1*/) - goto Large_Operand; - if (tgt_precision == 64 /* can ignore frac64 in compare */ - && (signed64)frac < (signed64)MASK64(0, 0+1)/*-2^63 >>1*/) - goto Large_Operand; - FPSCR_SET_XX(FPSCR & fpscr_fi); - if (tgt_precision == 32) - *frt = MASKED64(*frt, 0, 31) | (EXTRACTED64(frac, 33, 63) << 1) | frac64; - if (tgt_precision == 64) - *frt = (EXTRACTED64(frac, 1, 63) << 1) | frac64; - /*FPSCR[fprf] = undefined */ - goto Done; - /**/ - Infinity_Operand: + /***/ + if (EXTRACTED64(frb, 1, 11) == 2047 && EXTRACTED64(frb, 12, 63) == 0) + GOTO(Infinity_Operand); + if (EXTRACTED64(frb, 1, 11) == 2047 && EXTRACTED64(frb, 12, 12) == 0) + GOTO(SNaN_Operand); + if (EXTRACTED64(frb, 1, 11) == 2047 && EXTRACTED64(frb, 12, 12) == 1) + GOTO(QNaN_Operand); + if (EXTRACTED64(frb, 1, 11) > 1086) GOTO(Large_Operand); + if (EXTRACTED64(frb, 1, 11) > 0) exp = EXTRACTED64(frb, 1, 11) - 1023; + if (EXTRACTED64(frb, 1, 11) == 0) exp = -1022; + if (EXTRACTED64(frb, 1, 11) > 0) { /* normal */ + frac = BIT64(1) | INSERTED64(EXTRACTED64(frb, 12, 63), 2, 53); + frac64 = 0; + } + if (EXTRACTED64(frb, 1, 11) == 0) { /* denorm */ + frac = INSERTED64(EXTRACTED64(frb, 12, 63), 2, 53); + frac64 = 0; + } + gbit = 0, rbit = 0, xbit = 0; + for (i = 1; i <= 63 - exp; i++) { + xbit = rbit | xbit; + rbit = gbit; + gbit = frac64; + frac64 = EXTRACTED64(frac, 63, 63); + frac = INSERTED64(EXTRACTED64(frac, 0, 62), 1, 63); + } + Round_Integer(processor, sign, &frac, &frac64, gbit, rbit, xbit, round_mode); + if (sign == 1) { /* frac[0:64] = ~frac[0:64] + 1 */ + frac = ~frac; + frac64 ^= 1; + frac += (frac64 ? 1 : 0); + frac64 = (frac64 + 1) & 0x1; + } + if (tgt_precision == 32 /* can ignore frac64 in compare */ + && (signed64)frac > (signed64)MASK64(33+1, 63)/*2^31-1 >>1*/) + GOTO(Large_Operand); + if (tgt_precision == 64 /* can ignore frac64 in compare */ + && (signed64)frac > (signed64)MASK64(1+1, 63)/*2^63-1 >>1*/) + GOTO(Large_Operand); + if (tgt_precision == 32 /* can ignore frac64 in compare */ + && (signed64)frac < (signed64)MASK64(0, 32+1)/*-2^31 >>1*/) + GOTO(Large_Operand); + if (tgt_precision == 64 /* can ignore frac64 in compare */ + && (signed64)frac < (signed64)MASK64(0, 0+1)/*-2^63 >>1*/) + GOTO(Large_Operand); + FPSCR_SET_XX(FPSCR & fpscr_fi); + if (tgt_precision == 32) + *frt = MASKED64(*frt, 0, 31) | (EXTRACTED64(frac, 33, 63) << 1) | frac64; + if (tgt_precision == 64) + *frt = (EXTRACTED64(frac, 1, 63) << 1) | frac64; + /*FPSCR[fprf] = undefined */ + GOTO(Done); + /**/ + LABEL(Infinity_Operand): FPSCR_SET_FR(0); FPSCR_SET_FI(0); FPSCR_OR_VX(fpscr_vxcvi); @@ -1201,9 +1240,9 @@ void::function::convert_to_integer:cpu *processor, unsigned_word cia, unsigned64 } /* FPSCR[FPRF] = undefined */ } - goto Done; + GOTO(Done); /**/ - SNaN_Operand: + LABEL(SNaN_Operand): FPSCR_SET_FR(0); FPSCR_SET_FI(0); FPSCR_OR_VX(fpscr_vxsnan | fpscr_vxcvi); @@ -1212,9 +1251,9 @@ void::function::convert_to_integer:cpu *processor, unsigned_word cia, unsigned64 if (tgt_precision == 64) *frt = BIT64(0); /*0x8000_0000_0000_0000*/ /* FPSCR[fprf] = undefined */ } - goto Done; + GOTO(Done); /**/ - QNaN_Operand: + LABEL(QNaN_Operand): FPSCR_SET_FR(0); FPSCR_SET_FI(0); FPSCR_OR_VX(fpscr_vxcvi); @@ -1223,9 +1262,9 @@ void::function::convert_to_integer:cpu *processor, unsigned_word cia, unsigned64 if (tgt_precision == 64) *frt = BIT64(0);/*0x8000_0000_0000_0000*/ /* FPSCR[fprf] = undefined */ } - goto Done; + GOTO(Done); /**/ - Large_Operand: + LABEL(Large_Operand): FPSCR_SET_FR(0); FPSCR_SET_FI(0); FPSCR_OR_VX(fpscr_vxcvi); @@ -1241,7 +1280,7 @@ void::function::convert_to_integer:cpu *processor, unsigned_word cia, unsigned64 /* FPSCR[fprf] = undefined */ } /**/ - Done: + LABEL(Done):; # extract out raw fields of a FP number @@ -1278,13 +1317,13 @@ int::function::is_den:unsigned64 frs, int single : 0); int::function::is_inf:unsigned64 frs, int single int exp = biased_exp(frs, single); - int frac = fraction(frs, single); + unsigned64 frac = fraction(frs, single); return (exp == (single ? 255 : 2047) && frac == 0 ? sign(frs) : 0); int::function::is_NaN:unsigned64 frs, int single int exp = biased_exp(frs, single); - int frac = fraction(frs, single); + unsigned64 frac = fraction(frs, single); return (exp == (single ? 255 : 2047) && frac != 0 ? sign(frs) : 0); @@ -1398,7 +1437,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, } else { /* arrith, frsp */ *frt = select_qnan(fra, frb, frc, - instruction_is_frsp, 0/*generate*/, single); + instruction_is_frsp, 1/*generate*/, single); FPSCR_SET_FR(0); FPSCR_SET_FI(0); FPSCR_SET_FPRF(fpscr_rf_quiet_nan); @@ -1408,21 +1447,71 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, +# detect divide by zero +int::function::is_invalid_zero_divide:cpu *processor, unsigned_word cia, unsigned64 fra, unsigned64 frb, int single + int fail = 0; + if (is_zero (frb)) { + FPSCR_SET_ZX (1); + fail = 1; + } + return fail; + + + + +# handle case of invalid operation +void::function::invalid_zero_divide_operation:cpu *processor, unsigned_word cia, unsigned64 *frt, unsigned64 fra, unsigned64 frb, int single + if (FPSCR & fpscr_ze) { + /* zero-divide exception enabled */ + /* FRT unchaged */ + FPSCR_SET_FR(0); + FPSCR_SET_FI(0); + /* fpscr_FPRF unchanged */ + } + else { + /* zero-divide exception disabled */ + FPSCR_SET_FR(0); + FPSCR_SET_FI(0); + if ((sign (fra) < 0 && sign (frb) < 0) + || (sign (fra) > 0 && sign (frb) > 0)) { + *frt = MASK64 (1, 11); /* 0 : 2047 : 0..0 */ + FPSCR_SET_FPRF(fpscr_rf_pos_infinity); + } + else { + *frt = MASK64 (0, 11); /* 1 : 2047 : 0..0 */ + FPSCR_SET_FPRF(fpscr_rf_neg_infinity); + } + } + + + + + +# +# 0.0.0.0 Illegal instruction used for kernel mode emulation +# +0.0,6./,11./,16./,21./,31.1:X:::instruction_call + if (!os_emul_instruction_call(processor, cia, real_addr(cia, 1))) + program_interrupt(processor, cia, + illegal_instruction_program_interrupt); + # # I.2.4.1 Branch Instructions # -0.18,6.LI,30.AA,31.LK:I:t::Branch +0.18,6.LI,30.AA,31.LK:I:::Branch *601: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 *603: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 *603e:PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 *604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 + /* option_mpc860c0: + No problem here because this branch is predicted taken (unconditional). */ if (AA) NIA = IEA(EXTS(LI_0b00)); else NIA = IEA(CIA + EXTS(LI_0b00)); if (LK) LR = (spreg)CIA+4; if (CURRENT_MODEL_ISSUE > 0) model_branches(cpu_model(processor), 1, -1); -0.16,6.BO,11.BI,16.BD,30.AA,31.LK:B:t::Branch Conditional +0.16,6.BO,11.BI,16.BD,30.AA,31.LK:B:::Branch Conditional *601: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 *603: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 *603e:PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 @@ -1443,6 +1532,15 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, else succeed = 0; if (LK) LR = (spreg)IEA(CIA + 4); + if (option_mpc860c0 && (!BO{0} || !BO{2}) && !BO{4}) { + /* This branch is predicted as "normal". + If this is a forward branch and it is near the end of a page, + we've detected a problematic branch. */ + if (succeed && NIA > CIA) { + if (PAGE_SIZE - (CIA & (PAGE_SIZE-1)) <= option_mpc860c0) + program_interrupt(processor, cia, mpc860c0_instruction_program_interrupt); + } + } if (CURRENT_MODEL_ISSUE > 0) model_branches(cpu_model(processor), succeed, BO); if (! BO{0}) { @@ -1456,7 +1554,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, model_branch_predict(cpu_model(processor), reverse ? !succeed : succeed); } -0.19,6.BO,11.BI,16./,21.16,31.LK:XL:t::Branch Conditional to Link Register +0.19,6.BO,11.BI,16./,21.16,31.LK:XL:::Branch Conditional to Link Register *601: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 *603: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 *603e:PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 @@ -1476,13 +1574,22 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, else succeed = 0; if (LK) LR = (spreg)IEA(CIA + 4); + if (option_mpc860c0 && (!BO{0} || !BO{2}) && !BO{4}) { + /* This branch is predicted as not-taken. + If this is a forward branch and it is near the end of a page, + we've detected a problematic branch. */ + if (succeed && NIA > CIA) { + if (PAGE_SIZE - (CIA & (PAGE_SIZE-1)) <= option_mpc860c0) + program_interrupt(processor, cia, mpc860c0_instruction_program_interrupt); + } + } if (CURRENT_MODEL_ISSUE > 0) { model_branches(cpu_model(processor), succeed, BO); if (! BO{0}) model_branch_predict(cpu_model(processor), BO{4} ? !succeed : succeed); } -0.19,6.BO,11.BI,16./,21.528,31.LK:XL:t::Branch Conditional to Count Register +0.19,6.BO,11.BI,16./,21.528,31.LK:XL:::Branch Conditional to Count Register *601: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 *603: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 *603e:PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 @@ -1498,6 +1605,15 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, else succeed = 0; if (LK) LR = (spreg)IEA(CIA + 4); + if (option_mpc860c0 && (!BO{0} || !BO{2}) && !BO{4}) { + /* This branch is predicted as not-taken. + If this is a forward branch and it is near the end of a page, + we've detected a problematic branch. */ + if (succeed && NIA > CIA) { + if (PAGE_SIZE - (CIA & (PAGE_SIZE-1)) <= option_mpc860c0) + program_interrupt(processor, cia, mpc860c0_instruction_program_interrupt); + } + } if (CURRENT_MODEL_ISSUE > 0) { model_branches(cpu_model(processor), succeed, BO); if (! BO{0}) @@ -1507,13 +1623,13 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # # I.2.4.2 System Call Instruction # -0.17,6./,11./,16./,30.1,31./:SC:t::System Call +0.17,6./,11./,16./,30.1,31./:SC:::System Call *601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *603: PPC_UNIT_SRU, PPC_UNIT_SRU, 3, 3, 0 *603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 3, 3, 0 *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 if (CURRENT_MODEL_ISSUE > 0) - model_serialize(my_index, cpu_model(processor)); + model_serialize(MY_INDEX, cpu_model(processor)); system_call_interrupt(processor, cia); # @@ -1606,7 +1722,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + EXTS(D); *rT = MEM(unsigned, EA, 1); @@ -1620,7 +1736,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + *rB; *rT = MEM(unsigned, EA, 1); @@ -1632,7 +1748,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word EA; - if (RA == 0 || RA == RT) + if (RA_is_0 || RA == RT) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + EXTS(D); @@ -1646,7 +1762,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word EA; - if (RA == 0 || RA == RT) + if (RA_is_0 || RA == RT) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + *rB; @@ -1661,7 +1777,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + EXTS(D); *rT = MEM(unsigned, EA, 2); @@ -1674,7 +1790,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + *rB; *rT = MEM(unsigned, EA, 2); @@ -1686,7 +1802,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word EA; - if (RA == 0 || RA == RT) + if (RA_is_0 || RA == RT) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + EXTS(D); @@ -1700,7 +1816,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word EA; - if (RA == 0 || RA == RT) + if (RA_is_0 || RA == RT) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + *rB; @@ -1715,7 +1831,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + EXTS(D); *rT = MEM(signed, EA, 2); @@ -1728,7 +1844,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + *rB; *rT = MEM(signed, EA, 2); @@ -1740,11 +1856,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word EA; - if (RA == 0 || RA == RT) + if (RA_is_0 || RA == RT) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + EXTS(D); *rT = MEM(signed, EA, 2); + *rA = EA; PPC_INSN_INT(RT_BITMASK | RA_BITMASK, RA_BITMASK, 0); 0.31,6.RT,11.RA,16.RB,21.375,31./:X:::Load Halfword Algebraic with Update Indexed @@ -1753,7 +1870,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word EA; - if (RA == 0 || RA == RT) + if (RA_is_0 || RA == RT) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + *rB; @@ -1768,7 +1885,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + EXTS(D); *rT = MEM(unsigned, EA, 4); @@ -1781,7 +1898,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + *rB; *rT = MEM(unsigned, EA, 4); @@ -1793,7 +1910,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word EA; - if (RA == 0 || RA == RT) + if (RA_is_0 || RA == RT) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + EXTS(D); @@ -1807,7 +1924,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word EA; - if (RA == 0 || RA == RT) + if (RA_is_0 || RA == RT) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + *rB; @@ -1818,7 +1935,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, 0.58,6.RT,11.RA,16.DS,30.2:DS:64::Load Word Algebraic # unsigned_word b; # unsigned_word EA; -# if (RA == 0) b = 0; +# if (RA_is_0) b = 0; # else b = *rA; # EA = b + EXTS(DS_0b00); # *rT = MEM(signed, EA, 4); @@ -1826,14 +1943,14 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, 0.31,6.RT,11.RA,16.RB,21.341,31./:X:64::Load Word Algebraic Indexed # unsigned_word b; # unsigned_word EA; -# if (RA == 0) b = 0; +# if (RA_is_0) b = 0; # else b = *rA; # EA = b + *rB;; # *rT = MEM(signed, EA, 4); 0.31,6.RT,11.RA,16.RB,21.373,31./:X:64::Load Word Algebraic with Update Indexed # unsigned_word EA; -# if (RA == 0 || RA == RT) +# if (RA_is_0 || RA == RT) # program_interrupt(processor, cia # illegal_instruction_program_interrupt); # EA = *rA + *rB; @@ -1843,7 +1960,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, 0.58,6.RT,11.RA,16.DS,30.0:DS:64::Load Doubleword # unsigned_word b; # unsigned_word EA; -# if (RA == 0) b = 0; +# if (RA_is_0) b = 0; # else b = *rA; # EA = b + EXTS(DS_0b00); # *rT = MEM(unsigned, EA, 8); @@ -1851,14 +1968,14 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, 0.31,6.RT,11.RA,16.RB,21.21,31./:X:64::Load Doubleword Indexed # unsigned_word b; # unsigned_word EA; -# if (RA == 0) b = 0; +# if (RA_is_0) b = 0; # else b = *rA; # EA = b + *rB; # *rT = MEM(unsigned, EA, 8); 0.58,6.RT,11.RA,16.DS,30.1:DS:64::Load Doubleword with Update # unsigned_word EA; -# if (RA == 0 || RA == RT) +# if (RA_is_0 || RA == RT) # program_interrupt(processor, cia # illegal_instruction_program_interrupt); # EA = *rA + EXTS(DS_0b00); @@ -1867,7 +1984,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, 0.31,6.RT,11.RA,16.RB,21.53,31./:DS:64::Load Doubleword with Update Indexed # unsigned_word EA; -# if (RA == 0 || RA == RT) +# if (RA_is_0 || RA == RT) # program_interrupt(processor, cia # illegal_instruction_program_interrupt); # EA = *rA + *rB; @@ -1887,7 +2004,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + EXTS(D); STORE(EA, 1, *rS); @@ -1900,7 +2017,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + *rB; STORE(EA, 1, *rS); @@ -1912,7 +2029,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; - if (RA == 0) + if (RA_is_0) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + EXTS(D); @@ -1926,7 +2043,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; - if (RA == 0) + if (RA_is_0) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + *rB; @@ -1941,7 +2058,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + EXTS(D); STORE(EA, 2, *rS); @@ -1954,7 +2071,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + *rB; STORE(EA, 2, *rS); @@ -1966,7 +2083,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; - if (RA == 0) + if (RA_is_0) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + EXTS(D); @@ -1980,7 +2097,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; - if (RA == 0) + if (RA_is_0) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + *rB; @@ -1995,7 +2112,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + EXTS(D); STORE(EA, 4, *rS); @@ -2008,7 +2125,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + *rB; STORE(EA, 4, *rS); @@ -2020,7 +2137,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; - if (RA == 0) + if (RA_is_0) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + EXTS(D); @@ -2034,7 +2151,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; - if (RA == 0) + if (RA_is_0) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + *rB; @@ -2045,20 +2162,20 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, 0.62,6.RS,11.RA,16.DS,30.0:DS:64::Store Doubleword # unsigned_word b; # unsigned_word EA; -# if (RA == 0) b = 0; +# if (RA_is_0) b = 0; # else b = *rA; # EA = b + EXTS(DS_0b00); # STORE(EA, 8, *rS); 0.31,6.RS,11.RA,16.RB,21.149,31./:X:64::Store Doubleword Indexed # unsigned_word b; # unsigned_word EA; -# if (RA == 0) b = 0; +# if (RA_is_0) b = 0; # else b = *rA; # EA = b + *rB; # STORE(EA, 8, *rS); 0.62,6.RS,11.RA,16.DS,30.1:DS:64::Store Doubleword with Update # unsigned_word EA; -# if (RA == 0) +# if (RA_is_0) # program_interrupt(processor, cia # illegal_instruction_program_interrupt); # EA = *rA + EXTS(DS_0b00); @@ -2066,7 +2183,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # *rA = EA; 0.31,6.RS,11.RA,16.RB,21.181,31./:X:64::Store Doubleword with Update Indexed # unsigned_word EA; -# if (RA == 0) +# if (RA_is_0) # program_interrupt(processor, cia # illegal_instruction_program_interrupt); # EA = *rA + *rB; @@ -2085,7 +2202,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + *rB; *rT = SWAP_2(MEM(unsigned, EA, 2)); @@ -2098,7 +2215,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + *rB; *rT = SWAP_4(MEM(unsigned, EA, 4)); @@ -2111,7 +2228,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + *rB; STORE(EA, 2, SWAP_2(*rS)); @@ -2124,7 +2241,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + *rB; STORE(EA, 4, SWAP_4(*rS)); @@ -2135,22 +2252,159 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # I.3.3.5 Fixed-Point Load and Store Multiple Instrctions # -0.46,6.RT,11.RA,16.D:D:be::Load Multiple Word +0.46,6.RT,11.RA,16.D:D:::Load Multiple Word + unsigned_word EA; + unsigned_word b; + int r; + if (RA_is_0) b = 0; + else b = *rA; + EA = b + EXTS(D); + r = RT; + if (RA >= r) + program_interrupt(processor, cia, + illegal_instruction_program_interrupt); + if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT || (EA % 4 != 0)) + alignment_interrupt(processor, cia, EA); + while (r <= 31) { + GPR(r) = MEM(unsigned, EA, 4); + r = r + 1; + EA = EA + 4; + } -0.47,6.RS,11.RA,16.D:D:be::Store Multiple Word +0.47,6.RS,11.RA,16.D:D:::Store Multiple Word + unsigned_word EA; + unsigned_word b; + int r; + if (RA_is_0) b = 0; + else b = *rA; + EA = b + EXTS(D); + if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT + || (EA % 4 != 0)) + alignment_interrupt(processor, cia, EA); + r = RS; + while (r <= 31) { + STORE(EA, 4, GPR(r)); + r = r + 1; + EA = EA + 4; + } # # I.3.3.6 Fixed-Point Move Assist Instructions # -0.31,6.RT,11.RA,16.NB,21.597,31./:X:be::Load String Word Immediate - -0.31,6.RT,11.RA,16.RB,21.533,31./:X:be::Load String Word Indexed +0.31,6.RT,11.RA,16.NB,21.597,31./:X:::Load String Word Immediate + unsigned_word EA; + int n; + int r; + int i; + int nr; + if (RA_is_0) EA = 0; + else EA = *rA; + if (NB == 0) n = 32; + else n = NB; + r = RT - 1; + i = 32; + nr = (n + 3) / 4; + if ((RT + nr >= 32) + ? (RA >= RT || RA < (RT + nr) % 32) + : (RA >= RT && RA < RT + nr)) + program_interrupt(processor, cia, + illegal_instruction_program_interrupt); + if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT) + alignment_interrupt(processor, cia, EA); + while (n > 0) { + if (i == 32) { + r = (r + 1) % 32; + GPR(r) = 0; + } + GPR(r) |= INSERTED(MEM(unsigned, EA, 1), i, i+7); + i = i + 8; + if (i == 64) i = 32; + EA = EA + 1; + n = n - 1; + } -0.31,6.RS,11.RA,16.NB,21.725,31./:X:be::Store String Word Immedate +0.31,6.RT,11.RA,16.RB,21.533,31./:X:::Load String Word Indexed + unsigned_word EA; + unsigned_word b; + int n; + int r; + int i; + int nr; + if (RA_is_0) b = 0; + else b = *rA; + EA = b + *rB; + n = EXTRACTED32(XER, 25, 31); + r = RT - 1; + i = 32; + nr = (n + 3) / 4; + if (((RT + nr >= 32) + ? ((RA >= RT || RA < (RT + nr) % 32) + || (RB >= RT || RB < (RT + nr) % 32)) + : ((RA >= RT && RA < RT + nr) + || (RB >= RT && RB < RT + nr))) + || (RT == RA || RT == RB)) + program_interrupt(processor, cia, + illegal_instruction_program_interrupt); + if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT) + alignment_interrupt(processor, cia, EA); + while (n > 0) { + if (i == 32) { + r = (r + 1) % 32; + GPR(r) = 0; + } + GPR(r) |= INSERTED(MEM(unsigned, EA, 1), i, i+7); + i = i + 8; + if (i == 64) i = 32; + EA = EA + 1; + n = n - 1; + } -0.31,6.RS,11.RA,16.RB,21.661,31./:X:be::Store String Word Indexed +0.31,6.RS,11.RA,16.NB,21.725,31./:X:::Store String Word Immedate + unsigned_word EA; + int n; + int r; + int i; + if (RA_is_0) EA = 0; + else EA = *rA; + if (NB == 0) n = 32; + else n = NB; + r = RS - 1; + i = 32; + if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT) + alignment_interrupt(processor, cia, EA); + while (n > 0) { + if (i == 32) r = (r + 1) % 32; + STORE(EA, 1, EXTRACTED(GPR(r), i, i+7)); + i = i + 8; + if (i == 64) i = 32; + EA = EA + 1; + n = n - 1; + } + +0.31,6.RS,11.RA,16.RB,21.661,31./:X:::Store String Word Indexed + unsigned_word EA; + unsigned_word b; + int n; + int r; + int i; + if (RA_is_0) b = 0; + else b = *rA; + EA = b + *rB; + if (CURRENT_ALIGNMENT == STRICT_ALIGNMENT) + alignment_interrupt(processor, cia, EA); + n = EXTRACTED32(XER, 25, 31); + r = RS - 1; + i = 32; + while (n > 0) { + if (i == 32) r = (r + 1) % 32; + STORE(EA, 1, EXTRACTED(GPR(r), i, i+7)); + i = i + 8; + if (i == 64) i = 32; + EA = EA + 1; + n = n - 1; + } # @@ -2168,7 +2422,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + *rB; RESERVE = 1; @@ -2180,7 +2434,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, 0.31,6.RT,11.RA,16.RB,21.84,31./:X:64::Load Doubleword And Reserve Indexed unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + *rB; RESERVE = 1; @@ -2196,7 +2450,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 3, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + *rB; if (RESERVE) { @@ -2219,7 +2473,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, 0.31,6.RS,11.RA,16.RB,21.214,31.1:X:64::Store Doubleword Conditional Indexed unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + *rB; if (RESERVE) { @@ -2239,7 +2493,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, } PPC_INSN_INT(0, (RA_BITMASK & ~1) | RB_BITMASK | RS_BITMASK, 1/*Rc*/); -0.31,6./,11./,16./,21.598,31./:X::sync:Synchronize +0.31,6./,9.L,11./,16./,21.598,31./:X::sync:Synchronize *601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 *603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 @@ -2251,13 +2505,14 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # I.3.3.9 Fixed-Point Arithmetic Instructions # -0.14,6.RT,11.RA,16.SI:D:T::Add Immediate +0.14,6.RT,11.RA,16.SI:D:::Add Immediate *601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *603e:PPC_UNIT_IU, PPC_UNIT_SRU, 1, 1, 0 *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 if (RA_is_0) *rT = EXTS(SI); else *rT = *rA + EXTS(SI); + ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rT, (long)*rT)); PPC_INSN_INT(RT_BITMASK, (RA_BITMASK & ~1), 0); 0.15,6.RT,11.RA,16.SI:D:::Add Immediate Shifted @@ -2267,6 +2522,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 if (RA_is_0) *rT = EXTS(SI) << 16; else *rT = *rA + (EXTS(SI) << 16); + ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rT, (long)*rT)); PPC_INSN_INT(RT_BITMASK, (RA_BITMASK & ~1), 0); 0.31,6.RT,11.RA,16.RB,21.OE,22.266,31.Rc:XO:::Add @@ -2374,21 +2630,23 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 -# ALU_BEGIN(*rA); -# ALU_ADD_CA; -# ALU_SUB(1); -# ALU_END(*rT, 1/*CA*/, OE, Rc); + ALU_BEGIN(*rA); + ALU_ADD_CA; + ALU_ADD(-1); + ALU_END(*rT, 1/*CA*/, OE, Rc); + PPC_INSN_INT(RT_BITMASK, RA_BITMASK, Rc); 0.31,6.RT,11.RA,16./,21.OE,22.232,31.Rc:XO:::Subtract From Minus One Extended *601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 -# ALU_BEGIN(*rA); -# ALU_NOT; -# ALU_ADD_CA; -# ALU_SUB(1); -# ALU_END(*rT, 1/*CA*/, OE, Rc); + ALU_BEGIN(*rA); + ALU_NOT; + ALU_ADD_CA; + ALU_ADD(-1); + ALU_END(*rT, 1/*CA*/, OE, Rc); + PPC_INSN_INT(RT_BITMASK, RA_BITMASK, Rc); 0.31,6.RT,11.RA,16./,21.OE,22.202,31.Rc:XO::addze:Add to Zero Extended *601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 @@ -2465,7 +2723,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, 0.31,6.RT,11.RA,16.RB,21./,22.9,31.Rc:XO:64::Multiply High Doubleword Unsigned -0.31,6.RT,11.RA,16.RB,21./,22.11,31.Rc:XO::milhwu:Multiply High Word Unsigned +0.31,6.RT,11.RA,16.RB,21./,22.11,31.Rc:XO::mulhwu:Multiply High Word Unsigned *601: PPC_UNIT_IU, PPC_UNIT_IU, 10, 10, 0 *603: PPC_UNIT_IU, PPC_UNIT_IU, 6, 6, 0 *603e:PPC_UNIT_IU, PPC_UNIT_IU, 6, 6, 0 @@ -2696,6 +2954,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS & UI; CR0_COMPARE(*rA, 0, 1/*Rc*/); + ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA)); PPC_INSN_INT(RA_BITMASK, RS_BITMASK, 1/*Rc*/); 0.29,6.RS,11.RA,16.UI:D:::AND Immediate Shifted @@ -2705,6 +2964,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS & (UI << 16); CR0_COMPARE(*rA, 0, 1/*Rc*/); + ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA)); PPC_INSN_INT(RA_BITMASK, RS_BITMASK, 1/*Rc*/); 0.24,6.RS,11.RA,16.UI:D:::OR Immediate @@ -2713,6 +2973,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS | UI; + ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA)); PPC_INSN_INT(RA_BITMASK, RS_BITMASK, 0/*Rc*/); 0.25,6.RS,11.RA,16.UI:D:::OR Immediate Shifted @@ -2721,6 +2982,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS | (UI << 16); + ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA)); PPC_INSN_INT(RA_BITMASK, RS_BITMASK, 0/*Rc*/); 0.26,6.RS,11.RA,16.UI:D:::XOR Immediate @@ -2729,6 +2991,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS ^ UI; + ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA)); PPC_INSN_INT(RA_BITMASK, RS_BITMASK, 0/*Rc*/); 0.27,6.RS,11.RA,16.UI:D:::XOR Immediate Shifted @@ -2737,6 +3000,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS ^ (UI << 16); + ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA)); PPC_INSN_INT(RA_BITMASK, RS_BITMASK, 0/*Rc*/); 0.31,6.RS,11.RA,16.RB,21.28,31.Rc:X:::AND @@ -2746,6 +3010,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS & *rB; CR0_COMPARE(*rA, 0, Rc); + ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA)); PPC_INSN_INT(RA_BITMASK, RS_BITMASK | RB_BITMASK, Rc); 0.31,6.RS,11.RA,16.RB,21.444,31.Rc:X:::OR @@ -2755,6 +3020,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS | *rB; CR0_COMPARE(*rA, 0, Rc); + ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA)); PPC_INSN_INT(RA_BITMASK, RS_BITMASK | RB_BITMASK, Rc); 0.31,6.RS,11.RA,16.RB,21.316,31.Rc:X:::XOR @@ -2764,6 +3030,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS ^ *rB; CR0_COMPARE(*rA, 0, Rc); + ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA)); PPC_INSN_INT(RA_BITMASK, RS_BITMASK | RB_BITMASK, Rc); 0.31,6.RS,11.RA,16.RB,21.476,31.Rc:X:::NAND @@ -2773,6 +3040,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = ~(*rS & *rB); CR0_COMPARE(*rA, 0, Rc); + ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA)); PPC_INSN_INT(RA_BITMASK, RS_BITMASK | RB_BITMASK, Rc); 0.31,6.RS,11.RA,16.RB,21.124,31.Rc:X:::NOR @@ -2782,6 +3050,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = ~(*rS | *rB); CR0_COMPARE(*rA, 0, Rc); + ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA)); PPC_INSN_INT(RA_BITMASK, RS_BITMASK | RB_BITMASK, Rc); 0.31,6.RS,11.RA,16.RB,21.284,31.Rc:X:::Equivalent @@ -2789,8 +3058,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 -# *rA = ~(*rS ^ *rB); /* A === B */ -# CR0_COMPARE(*rA, 0, Rc); + *rA = ~(*rS ^ *rB); /* A === B */ + CR0_COMPARE(*rA, 0, Rc); + ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA)); + PPC_INSN_INT(RA_BITMASK, RS_BITMASK | RB_BITMASK, Rc); 0.31,6.RS,11.RA,16.RB,21.60,31.Rc:X:::AND with Complement *601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 @@ -2799,6 +3070,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS & ~*rB; CR0_COMPARE(*rA, 0, Rc); + ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA)); PPC_INSN_INT(RA_BITMASK, RS_BITMASK | RB_BITMASK, Rc); 0.31,6.RS,11.RA,16.RB,21.412,31.Rc:X:::OR with Complement @@ -2808,6 +3080,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS | ~*rB; CR0_COMPARE(*rA, 0, Rc); + ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA)); PPC_INSN_INT(RA_BITMASK, RS_BITMASK | RB_BITMASK, Rc); 0.31,6.RS,11.RA,16./,21.954,31.Rc:X::extsb:Extend Sign Byte @@ -2817,6 +3090,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = (signed_word)(signed8)*rS; CR0_COMPARE(*rA, 0, Rc); + ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA)); PPC_INSN_INT(RA_BITMASK, RS_BITMASK, Rc); 0.31,6.RS,11.RA,16./,21.922,31.Rc:X::extsh:Extend Sign Half Word @@ -2826,6 +3100,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = (signed_word)(signed16)*rS; CR0_COMPARE(*rA, 0, Rc); + ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA)); PPC_INSN_INT(RA_BITMASK, RS_BITMASK, Rc); 0.31,6.RS,11.RA,16./,21.986,31.Rc:X:64::Extend Sign Word @@ -2860,6 +3135,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, count++; } *rA = count; + ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA)); CR0_COMPARE(count, 0, Rc); /* FIXME - is this correct */ @@ -2874,6 +3150,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # unsigned_word m = MASK(b, 63); # signed_word result = r & m; # *rA = result; +# ITRACE(trace_alu, (" Result = %ld (0x%lx)\n", (long)*rA, (long)*rA)); # CR0_COMPARE(result, 0, Rc); /* FIXME - is this correct */ 0.30,6.RS,11.RA,16.sh_0_4,21.me,27.1,30.sh_5,31.Rc:MD:64::Rotate Left Doubleword Immediate then Clear Right @@ -2931,12 +3208,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # CR0_COMPARE(result, 0, Rc); 0.23,6.RS,11.RA,16.RB,21.MB,26.ME,31.Rc:M:::Rotate Left Word then AND with Mask -# long n = MASKED(*rB, 59, 63); -# unsigned32 r = ROTL32(*rS, n); -# unsigned32 m = MASK(MB+32, ME+32); -# signed_word result = r & m; -# *rA = result; -# CR0_COMPARE(result, 0, Rc); + long n = MASKED(*rB, 59, 63); + unsigned32 r = ROTL32(*rS, n); + unsigned32 m = MASK(MB+32, ME+32); + signed_word result = r & m; + *rA = result; + CR0_COMPARE(result, 0, Rc); 0.30,6.RS,11.RA,16.sh_0_4,21.mb,27.3,30.sh_5,31.Rc:MD:64::Rotate Left Doubleword Immediate then Mask Insert # long n = (sh_5 << 4) | sh_0_4; @@ -2971,7 +3248,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 - int n = MASKED(*rB, 59, 63); + int n = MASKED(*rB, 58, 63); unsigned32 source = *rS; signed_word shifted; if (n < 32) @@ -2992,7 +3269,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 - int n = MASKED(*rB, 59, 63); + int n = MASKED(*rB, 58, 63); unsigned32 source = *rS; signed_word shifted; if (n < 32) @@ -3024,6 +3301,8 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, else XER &= ~xer_carry; CR0_COMPARE(shifted, 0, Rc); + ITRACE(trace_alu, (" Result = %ld (0x%lx), XER = %ld\n", + (long)*rA, (long)*rA, (long)XER)); PPC_INSN_INT(RA_BITMASK, RS_BITMASK, Rc); 0.31,6.RS,11.RA,16.RB,21.794,31.Rc:X:64::Shift Right Algebraic Doubleword @@ -3033,17 +3312,26 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 - int n = MASKED(*rB, 58, 63); - int shift = (n >= 31 ? 31 : n); + unsigned64 mask; + int n = MASKED(*rB, 59, 63); signed32 source = (signed32)*rS; /* signed to keep sign bit */ - signed32 shifted = source >> shift; - unsigned32 mask = ((unsigned32)-1) >> (31-shift); - *rA = (signed_word)shifted; /* if 64bit will sign extend */ - if (source < 0 && (source & mask)) + signed32 shifted = source >> n; + int S = (MASKED(*rS,32,32) != 0); + signed64 r = ((unsigned64) source); + r = ((unsigned64) source) << 32 | (unsigned32) source; + r = ROTL64(r,64-n); + if (MASKED(*rB,58,58) == 0) + mask = (unsigned64) MASK64(n+32,63); + else + mask = (unsigned64) 0; + *rA = (signed_word) (r & mask | ((signed64) -1*S) & ~mask); /* if 64bit will sign extend */ + if (S && (MASKED(r & ~mask,32,63)!=0)) XER |= xer_carry; else XER &= ~xer_carry; - CR0_COMPARE(shifted, 0, Rc); + CR0_COMPARE(*rA, 0, Rc); + ITRACE(trace_alu, (" Result = %ld (0x%lx), XER = %ld\n", + (long)*rA, (long)*rA, (long)XER)); PPC_INSN_INT(RA_BITMASK, RS_BITMASK, Rc); # @@ -3067,7 +3355,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, spreg new_val = (spr_length(n) == 64 ? *rS : MASKED(*rS, 32, 63)); - /* HACK - time base registers need to be updated immediatly */ + /* HACK - time base registers need to be updated immediately */ if (WITH_TIME_BASE) { switch (n) { case spr_tbu: @@ -3107,8 +3395,31 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, program_interrupt(processor, cia, illegal_instruction_program_interrupt); else { - /* HACK - some SPR's need to get their value extracted specially */ - *rT = SPREG(n); + /* HACK - time base registers need to be calculated */ + if (WITH_TIME_BASE) { + switch (n) { + case spr_dec: + *rT = cpu_get_decrementer(processor); + break; + case spr_tbrl: + if (is_64bit_implementation) *rT = TB; + else *rT = EXTRACTED64(TB, 32, 63); + break; + case spr_tbru: + if (is_64bit_implementation) *rT = EXTRACTED64(TB, 0, 31); + else *rT = EXTRACTED64(TB, 0, 31); + break; + case spr_tbu: + case spr_tbl: + /* NOTE - these SPR's are not readable. Use mftb[ul] */ + default: + *rT = SPREG(n); + break; + } + } + else { + *rT = SPREG(n); + } } PPC_INSN_FROM_SPR(RT_BITMASK, n); @@ -3132,6 +3443,8 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, PPC_INSN_MTCR(RS_BITMASK, FXM); 0.31,6.BF,9./,11./,16./,21.512,31./:X:::Move to Condition Register from XER +# CR_SET(BF, EXTRACTED32(XER, 0, 3)); +# MBLIT32(XER, 0, 3, 0); 0.31,6.RT,11./,16./,21.19,31./:X:::Move From Condition Register *601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 @@ -3152,7 +3465,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + EXTS(D); *frT = DOUBLE(MEM(unsigned, EA, 4)); @@ -3165,7 +3478,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + *rB; *frT = DOUBLE(MEM(unsigned, EA, 4)); @@ -3177,7 +3490,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; - if (RA == 0) + if (RA_is_0) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + EXTS(D); @@ -3185,13 +3498,13 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *rA = EA; PPC_INSN_INT_FLOAT(RA_BITMASK, FRT_BITMASK, (RA_BITMASK & ~1), 0); -0.31,6.FRT,11.RA,16.RB,21.576,31./:X:f::Load Floating-Point Single with Update Indexed +0.31,6.FRT,11.RA,16.RB,21.567,31./:X:f::Load Floating-Point Single with Update Indexed *601: PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0 *603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; - if (RA == 0) + if (RA_is_0) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + *rB; @@ -3206,7 +3519,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + EXTS(D); *frT = MEM(unsigned, EA, 8); @@ -3219,7 +3532,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + *rB; *frT = MEM(unsigned, EA, 8); @@ -3231,7 +3544,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; - if (RA == 0) + if (RA_is_0) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + EXTS(D); @@ -3245,7 +3558,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; - if (RA == 0) + if (RA_is_0) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + *rB; @@ -3265,7 +3578,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + EXTS(D); STORE(EA, 4, SINGLE(*frS)); @@ -3278,7 +3591,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + *rB; STORE(EA, 4, SINGLE(*frS)); @@ -3290,7 +3603,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; - if (RA == 0) + if (RA_is_0) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + EXTS(D); @@ -3304,7 +3617,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; - if (RA == 0) + if (RA_is_0) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + *rB; @@ -3319,7 +3632,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + EXTS(D); STORE(EA, 8, *frS); @@ -3332,19 +3645,31 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; - if (RA == 0) b = 0; + if (RA_is_0) b = 0; else b = *rA; EA = b + *rB; STORE(EA, 8, *frS); PPC_INSN_INT_FLOAT(0, 0, (RA_BITMASK & ~1) | RB_BITMASK, FRS_BITMASK); +0.31,6.FRS,11.RA,16.RB,21.983,31./:X:f::Store Floating-Point Integer Word Indexed +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 + unsigned_word b; + unsigned_word EA; + if (RA_is_0) b = 0; + else b = *rA; + EA = b + *rB; + STORE(EA, 4, *frS); + PPC_INSN_INT_FLOAT(0, 0, (RA_BITMASK & ~1) | RB_BITMASK, FRS_BITMASK); + 0.55,6.FRS,11.RA,16.D:D:f::Store Floating-Point Double with Update *601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 *603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; - if (RA == 0) + if (RA_is_0) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + EXTS(D); @@ -3358,7 +3683,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; - if (RA == 0) + if (RA_is_0) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + *rB; @@ -3586,6 +3911,13 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, 0, /*instruction_is_convert_to_32bit*/ 0); /*single-precision*/ } + else if (is_invalid_zero_divide (processor, cia, + *frA, *frB, + 0 /*single?*/)) { + invalid_zero_divide_operation (processor, cia, + frT, *frA, *frB, + 0 /*single?*/); + } else { /*HACK!*/ double s = *(double*)frA / *(double*)frB; @@ -3612,6 +3944,13 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, 0, /*instruction_is_convert_to_32bit*/ 1); /*single-precision*/ } + else if (is_invalid_zero_divide (processor, cia, + *frA, *frB, + 1 /*single?*/)) { + invalid_zero_divide_operation (processor, cia, + frT, *frA, *frB, + 1 /*single?*/); + } else { /*HACK!*/ float s = *(double*)frA / *(double*)frB; @@ -3633,12 +3972,14 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, fpscr_vxsnan | fpscr_vximz, 0, /*single?*/ 0) /*negate?*/) { + union { double d; unsigned64 u; } tmp; invalid_arithemetic_operation(processor, cia, - (unsigned64*)&product, *frA, 0, *frC, + &tmp.u, *frA, 0, *frC, 0, /*instruction_is_frsp*/ 0, /*instruction_is_convert_to_64bit*/ 0, /*instruction_is_convert_to_32bit*/ 0); /*single-precision*/ + product = tmp.d; } else { /*HACK!*/ @@ -3678,12 +4019,14 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, fpscr_vxsnan | fpscr_vximz, 1, /*single?*/ 0) /*negate?*/) { + union { double d; unsigned64 u; } tmp; invalid_arithemetic_operation(processor, cia, - (unsigned64*)&product, *frA, 0, *frC, + &tmp.u, *frA, 0, *frC, 0, /*instruction_is_frsp*/ 0, /*instruction_is_convert_to_64bit*/ 0, /*instruction_is_convert_to_32bit*/ 0); /*single-precision*/ + product = tmp.d; } else { /*HACK!*/ @@ -3723,12 +4066,14 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, fpscr_vxsnan | fpscr_vximz, 0, /*single?*/ 0) /*negate?*/) { + union { double d; unsigned64 u; } tmp; invalid_arithemetic_operation(processor, cia, - (unsigned64*)&product, *frA, 0, *frC, + &tmp.u, *frA, 0, *frC, 0, /*instruction_is_frsp*/ 0, /*instruction_is_convert_to_64bit*/ 0, /*instruction_is_convert_to_32bit*/ 0); /*single-precision*/ + product = tmp.d; } else { /*HACK!*/ @@ -3768,12 +4113,14 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, fpscr_vxsnan | fpscr_vximz, 1, /*single?*/ 0) /*negate?*/) { + union { double d; unsigned64 u; } tmp; invalid_arithemetic_operation(processor, cia, - (unsigned64*)&product, *frA, 0, *frC, + &tmp.u, *frA, 0, *frC, 0, /*instruction_is_frsp*/ 0, /*instruction_is_convert_to_64bit*/ 0, /*instruction_is_convert_to_32bit*/ 0); /*single-precision*/ + product = tmp.d; } else { /*HACK!*/ @@ -3813,12 +4160,14 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, fpscr_vxsnan | fpscr_vximz, 0, /*single?*/ 0) /*negate?*/) { + union { double d; unsigned64 u; } tmp; invalid_arithemetic_operation(processor, cia, - (unsigned64*)&product, *frA, 0, *frC, + &tmp.u, *frA, 0, *frC, 0, /*instruction_is_frsp*/ 0, /*instruction_is_convert_to_64bit*/ 0, /*instruction_is_convert_to_32bit*/ 0); /*single-precision*/ + product = tmp.d; } else { /*HACK!*/ @@ -3858,12 +4207,14 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, fpscr_vxsnan | fpscr_vximz, 1, /*single?*/ 0) /*negate?*/) { + union { double d; unsigned64 u; } tmp; invalid_arithemetic_operation(processor, cia, - (unsigned64*)&product, *frA, 0, *frC, + &tmp.u, *frA, 0, *frC, 0, /*instruction_is_frsp*/ 0, /*instruction_is_convert_to_64bit*/ 0, /*instruction_is_convert_to_32bit*/ 0); /*single-precision*/ + product = tmp.d; } else { /*HACK!*/ @@ -3903,12 +4254,14 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, fpscr_vxsnan | fpscr_vximz, 0, /*single?*/ 0) /*negate?*/) { + union { double d; unsigned64 u; } tmp; invalid_arithemetic_operation(processor, cia, - (unsigned64*)&product, *frA, 0, *frC, + &tmp.u, *frA, 0, *frC, 0, /*instruction_is_frsp*/ 0, /*instruction_is_convert_to_64bit*/ 0, /*instruction_is_convert_to_32bit*/ 0); /*single-precision*/ + product = tmp.d; } else { /*HACK!*/ @@ -3948,12 +4301,14 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, fpscr_vxsnan | fpscr_vximz, 1, /*single?*/ 0) /*negate?*/) { + union { double d; unsigned64 u; } tmp; invalid_arithemetic_operation(processor, cia, - (unsigned64*)&product, *frA, 0, *frC, + &tmp.u, *frA, 0, *frC, 0, /*instruction_is_frsp*/ 0, /*instruction_is_convert_to_64bit*/ 0, /*instruction_is_convert_to_32bit*/ 0); /*single-precision*/ + product = tmp.d; } else { /*HACK!*/ @@ -3993,28 +4348,29 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, int sign; int exp; unsigned64 frac_grx; - /* split off cases for what to do */ - if (EXTRACTED64(*frB, 1, 11) < 897 - && EXTRACTED64(*frB, 1, 63) > 0) { - if ((FPSCR & fpscr_ue) == 0) goto Disabled_Exponent_Underflow; - if ((FPSCR & fpscr_ue) != 0) goto Enabled_Exponent_Underflow; - } - if (EXTRACTED64(*frB, 1, 11) > 1150 - && EXTRACTED64(*frB, 1, 11) < 2047) { - if ((FPSCR & fpscr_oe) == 0) goto Disabled_Exponent_Overflow; - if ((FPSCR & fpscr_oe) != 0) goto Enabled_Exponent_Overflow; - } - if (EXTRACTED64(*frB, 1, 11) > 896 - && EXTRACTED64(*frB, 1, 11) < 1151) goto Normal_Operand; - if (EXTRACTED64(*frB, 1, 63) == 0) goto Zero_Operand; - if (EXTRACTED64(*frB, 1, 11) == 2047) { - if (EXTRACTED64(*frB, 12, 63) == 0) goto Infinity_Operand; - if (EXTRACTED64(*frB, 12, 12) == 1) goto QNaN_Operand; - if (EXTRACTED64(*frB, 12, 12) == 0 - && EXTRACTED64(*frB, 13, 63) > 0) goto SNaN_Operand; - } - /* handle them */ - Disabled_Exponent_Underflow: + /***/ + /* split off cases for what to do */ + if (EXTRACTED64(*frB, 1, 11) < 897 + && EXTRACTED64(*frB, 1, 63) > 0) { + if ((FPSCR & fpscr_ue) == 0) GOTO(Disabled_Exponent_Underflow); + if ((FPSCR & fpscr_ue) != 0) GOTO(Enabled_Exponent_Underflow); + } + if (EXTRACTED64(*frB, 1, 11) > 1150 + && EXTRACTED64(*frB, 1, 11) < 2047) { + if ((FPSCR & fpscr_oe) == 0) GOTO(Disabled_Exponent_Overflow); + if ((FPSCR & fpscr_oe) != 0) GOTO(Enabled_Exponent_Overflow); + } + if (EXTRACTED64(*frB, 1, 11) > 896 + && EXTRACTED64(*frB, 1, 11) < 1151) GOTO(Normal_Operand); + if (EXTRACTED64(*frB, 1, 63) == 0) GOTO(Zero_Operand); + if (EXTRACTED64(*frB, 1, 11) == 2047) { + if (EXTRACTED64(*frB, 12, 63) == 0) GOTO(Infinity_Operand); + if (EXTRACTED64(*frB, 12, 12) == 1) GOTO(QNaN_Operand); + if (EXTRACTED64(*frB, 12, 12) == 0 + && EXTRACTED64(*frB, 13, 63) > 0) GOTO(SNaN_Operand); + } + /**/ + LABEL(Disabled_Exponent_Underflow): sign = EXTRACTED64(*frB, 0, 0); if (EXTRACTED64(*frB, 1, 11) == 0) { exp = -1022; @@ -4026,7 +4382,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, } /* G|R|X == zero from above */ while (exp < -126) { - exp = exp - 1; + exp = exp + 1; frac_grx = (INSERTED64(EXTRACTED64(frac_grx, 0, 54), 1, 55) | MASKED64(frac_grx, 55, 55)); } @@ -4056,8 +4412,9 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, | INSERTED64(exp + 1023, 1, 11) | INSERTED64(EXTRACTED64(frac_grx, 1, 52), 12, 63)); } - goto Done; - Enabled_Exponent_Underflow: + GOTO(Done); + /**/ + LABEL(Enabled_Exponent_Underflow): FPSCR_SET_UX(1); sign = EXTRACTED64(*frB, 0, 0); if (EXTRACTED64(*frB, 1, 11) == 0) { @@ -4082,8 +4439,9 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, | INSERTED64(EXTRACTED64(frac_grx, 1, 52), 12, 63)); if (sign == 0) FPSCR_SET_FPRF(fpscr_rf_pos_normal_number); if (sign == 1) FPSCR_SET_FPRF(fpscr_rf_neg_normal_number); - goto Done; - Disabled_Exponent_Overflow: + GOTO(Done); + /**/ + LABEL(Disabled_Exponent_Overflow): FPSCR_SET_OX(1); if ((FPSCR & fpscr_rn) == fpscr_rn_round_to_nearest) { if (EXTRACTED64(*frB, 0, 0) == 0) { @@ -4128,43 +4486,49 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, /* FPSCR[FR] <- undefined */ FPSCR_SET_FI(1); FPSCR_SET_XX(1); - goto Done; - Enabled_Exponent_Overflow: + GOTO(Done); + /**/ + LABEL(Enabled_Exponent_Overflow): sign = EXTRACTED64(*frB, 0, 0); exp = EXTRACTED64(*frB, 1, 11) - 1023; frac_grx = BIT64(0) | INSERTED64(EXTRACTED64(*frB, 12, 63), 1, 52); Round_Single(processor, sign, &exp, &frac_grx); FPSCR_SET_XX(FPSCR & fpscr_fi); - Enabled_Overflow: - FPSCR_SET_OX(1); - exp = exp - 192; - *frT = (INSERTED64(sign, 0, 0) - | INSERTED64(exp + 1023, 1, 11) - | INSERTED64(EXTRACTED64(frac_grx, 1, 52), 12, 63)); - if (sign == 0) FPSCR_SET_FPRF(fpscr_rf_pos_normal_number); - if (sign == 1) FPSCR_SET_FPRF(fpscr_rf_neg_normal_number); - goto Done; - Zero_Operand: + /**/ + LABEL(Enabled_Overflow): + FPSCR_SET_OX(1); + exp = exp - 192; + *frT = (INSERTED64(sign, 0, 0) + | INSERTED64(exp + 1023, 1, 11) + | INSERTED64(EXTRACTED64(frac_grx, 1, 52), 12, 63)); + if (sign == 0) FPSCR_SET_FPRF(fpscr_rf_pos_normal_number); + if (sign == 1) FPSCR_SET_FPRF(fpscr_rf_neg_normal_number); + GOTO(Done); + /**/ + LABEL(Zero_Operand): *frT = *frB; if (EXTRACTED64(*frB, 0, 0) == 0) FPSCR_SET_FPRF(fpscr_rf_pos_zero); if (EXTRACTED64(*frB, 0, 0) == 1) FPSCR_SET_FPRF(fpscr_rf_neg_zero); FPSCR_SET_FR(0); FPSCR_SET_FI(0); - goto Done; - Infinity_Operand: + GOTO(Done); + /**/ + LABEL(Infinity_Operand): *frT = *frB; if (EXTRACTED64(*frB, 0, 0) == 0) FPSCR_SET_FPRF(fpscr_rf_pos_infinity); if (EXTRACTED64(*frB, 0, 0) == 1) FPSCR_SET_FPRF(fpscr_rf_neg_infinity); FPSCR_SET_FR(0); FPSCR_SET_FI(0); - goto Done; - QNaN_Operand: + GOTO(Done); + /**/ + LABEL(QNaN_Operand): *frT = INSERTED64(EXTRACTED64(*frB, 0, 34), 0, 34); FPSCR_SET_FPRF(fpscr_rf_quiet_nan); FPSCR_SET_FR(0); FPSCR_SET_FI(0); - goto Done; - SNaN_Operand: + GOTO(Done); + /**/ + LABEL(SNaN_Operand): FPSCR_OR_VX(fpscr_vxsnan); if ((FPSCR & fpscr_ve) == 0) { *frT = (MASKED64(*frB, 0, 11) @@ -4174,29 +4538,35 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, } FPSCR_SET_FR(0); FPSCR_SET_FI(0); - goto Done; - Normal_Operand: + GOTO(Done); + /**/ + LABEL(Normal_Operand): sign = EXTRACTED64(*frB, 0, 0); exp = EXTRACTED64(*frB, 1, 11) - 1023; frac_grx = BIT64(0) | INSERTED64(EXTRACTED64(*frB, 12, 63), 1, 52); Round_Single(processor, sign, &exp, &frac_grx); FPSCR_SET_XX(FPSCR & fpscr_fi); - if (exp > 127 && (FPSCR & fpscr_oe) == 0) goto Disabled_Exponent_Overflow; - if (exp > 127 && (FPSCR & fpscr_oe) != 0) goto Enabled_Overflow; + if (exp > 127 && (FPSCR & fpscr_oe) == 0) GOTO(Disabled_Exponent_Overflow); + if (exp > 127 && (FPSCR & fpscr_oe) != 0) GOTO(Enabled_Overflow); *frT = (INSERTED64(sign, 0, 0) | INSERTED64(exp + 1023, 1, 11) | INSERTED64(EXTRACTED64(frac_grx, 1, 52), 12, 63)); if (sign == 0) FPSCR_SET_FPRF(fpscr_rf_pos_normal_number); if (sign == 1) FPSCR_SET_FPRF(fpscr_rf_neg_normal_number); - goto Done; - Done: - PPC_INSN_FLOAT(FRT_BITMASK, FRB_BITMASK, Rc); + GOTO(Done); + /**/ + LABEL(Done): + PPC_INSN_FLOAT(FRT_BITMASK, FRB_BITMASK, Rc); + 0.63,6.FRT,11./,16.FRB,21.814,31.Rc:X:64,f::Floating Convert To Integer Doubleword + floating_point_assist_interrupt(processor, cia); 0.63,6.FRT,11./,16.FRB,21.815,31.Rc:X:64,f::Floating Convert To Integer Doubleword with round towards Zero + floating_point_assist_interrupt(processor, cia); 0.63,6.FRT,11./,16.FRB,21.14,31.Rc:X:f::Floating Convert To Integer Word + floating_point_assist_interrupt(processor, cia); 0.63,6.FRT,11./,16.FRB,21.15,31.Rc:X:f:fctiwz:Floating Convert To Integer Word with round towards Zero *601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0 @@ -4214,30 +4584,32 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, int sign = EXTRACTED64(*frB, 0, 0); int exp = 63; unsigned64 frac = *frB; - if (frac == 0) goto Zero_Operand; - if (sign == 1) frac = ~frac + 1; - while (EXTRACTED64(frac, 0, 0) == 0) { - /*??? do the loop 0 times if (FRB) = max negative integer */ - frac = INSERTED64(EXTRACTED64(frac, 1, 63), 0, 62); - exp = exp - 1; - } - Round_Float(processor, sign, &exp, &frac, FPSCR & fpscr_rn); - if (sign == 0) FPSCR_SET_FPRF(fpscr_rf_pos_normal_number); - if (sign == 1) FPSCR_SET_FPRF(fpscr_rf_pos_normal_number); - *frT = (INSERTED64(sign, 0, 0) - | INSERTED64(exp + 1023, 1, 11) - | INSERTED64(EXTRACTED64(frac, 1, 52), 12, 63)); - goto Done; + /***/ + if (frac == 0) GOTO(Zero_Operand); + if (sign == 1) frac = ~frac + 1; + while (EXTRACTED64(frac, 0, 0) == 0) { + /*??? do the loop 0 times if (FRB) = max negative integer */ + frac = INSERTED64(EXTRACTED64(frac, 1, 63), 0, 62); + exp = exp - 1; + } + Round_Float(processor, sign, &exp, &frac, FPSCR & fpscr_rn); + if (sign == 0) FPSCR_SET_FPRF(fpscr_rf_pos_normal_number); + if (sign == 1) FPSCR_SET_FPRF(fpscr_rf_pos_normal_number); + *frT = (INSERTED64(sign, 0, 0) + | INSERTED64(exp + 1023, 1, 11) + | INSERTED64(EXTRACTED64(frac, 1, 52), 12, 63)); + GOTO(Done); /**/ - Zero_Operand: + LABEL(Zero_Operand): FPSCR_SET_FR(0); FPSCR_SET_FI(0); FPSCR_SET_FPRF(fpscr_rf_pos_zero); *frT = 0; - goto Done; + GOTO(Done); /**/ - Done: - PPC_INSN_FLOAT(FRT_BITMASK, FRB_BITMASK, Rc); + LABEL(Done): + PPC_INSN_FLOAT(FRT_BITMASK, FRB_BITMASK, Rc); + # # I.4.6.7 Floating-Point Compare Instructions @@ -4299,41 +4671,87 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.63,6.FRT,11./,16./,21.583,31.Rc:X:f::Move From FPSCR + FPSCR_BEGIN; + *frT = FPSCR; + FPSCR_END(Rc); 0.63,6.BF,9./,11.BFA,14./,16./,21.64,31./:X:f::Move to Condition Register from FPSCR + FPSCR_BEGIN; + unsigned field = FPSCR_FIELD(BFA); + CR_SET(BF, field); + FPSCR_SET(BFA, 0); /* FPSCR_END fixes up FEX/VX */ + FPSCR_END(0); -0.64,6.BF,9./,11./,16.U,20./,21.134,31.Rc:X:f::Move To FPSCR Field Immediate +0.63,6.BF,9./,11./,16.U,20./,21.134,31.Rc:X:f::Move To FPSCR Field Immediate + FPSCR_BEGIN; + FPSCR_SET(BF, U); + FPSCR_END(Rc); 0.63,6./,7.FLM,15./,16.FRB,21.711,31.Rc:XFL:f::Move To FPSCR Fields + FPSCR_BEGIN; + int i; + for (i = 0; i < 8; i++) { + if ((FLM & BIT8(i))) { + FPSCR &= ~MASK32(i*4, i*4+3); + FPSCR |= MASKED32(*frB, i*4, i*4+3); + } + } + FPSCR_END(Rc); 0.63,6.BT,11./,16./,21.70,31.Rc:X:f::Move To FPSCR Bit 0 + FPSCR_BEGIN; + unsigned32 bit = BIT32(BT); + FPSCR &= ~bit; + FPSCR_END(Rc); 0.63,6.BT,11./,16./,21.38,31.Rc:X:f::Move To FPSCR Bit 1 - - -# -# I.A.1.1 Floating-Point Store Instruction -# -0.31,6.FRS,11.RA,16.RB,21.983,31./:X:f::Store Floating-Point as Integer Word Indexed + FPSCR_BEGIN; + unsigned32 bit = BIT32(BT); + if (bit & fpscr_fi) + bit |= fpscr_xx; + if ((bit & fpscr_vx_bits)) + bit |= fpscr_fx; + /* note - omit vx bit */ + if ((bit & (fpscr_ox | fpscr_ux | fpscr_zx | fpscr_xx))) + bit |= fpscr_fx; + FPSCR |= bit; + FPSCR_END(Rc); # # I.A.1.2 Floating-Point Arithmetic Instructions # -0.63,6.FRT,11./,16.FRB,21./,26.22,31.Rc:A:f::Floating Square Root +0.63,6.FRT,11./,16.FRB,21./,26.22,31.Rc:A:f,o::Floating Square Root + program_interrupt(processor, cia, optional_instruction_program_interrupt); -0.59,6.FRT,11./,16.FRB,21./,26.22,31.Rc:A:f::Floating Square Root Single +0.59,6.FRT,11./,16.FRB,21./,26.22,31.Rc:A:f,o::Floating Square Root Single + program_interrupt(processor, cia, optional_instruction_program_interrupt); -0.59,6.FRT,11./,16.FRB,21./,26.24,31.Rc:A:f::Floating Reciprocal Estimate Single +0.59,6.FRT,11./,16.FRB,21./,26.24,31.Rc:A:f,o::Floating Reciprocal Estimate Single + program_interrupt(processor, cia, optional_instruction_program_interrupt); -0.63,6.FRT,11./,16.FRB,21./,26.26,31.Rc:A:f::Floating Reciprocal Square Root Estimate +0.63,6.FRT,11./,16.FRB,21./,26.26,31.Rc:A:f,o::Floating Reciprocal Square Root Estimate + program_interrupt(processor, cia, optional_instruction_program_interrupt); # # I.A.1.3 Floating-Point Select Instruction # -0.63,6.FRT,11.FRA,16.FRB,21.FRC,26.23,31.Rc:A:f::Floating Select - +0.63,6.FRT,11.FRA,16.FRB,21.FRC,26.23,31.Rc:A:f,o::Floating Select +*601: PPC_UNIT_BAD, PPC_UNIT_BAD, 0, 0, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 + if (CURRENT_MODEL == MODEL_ppc601) { + program_interrupt(processor, cia, optional_instruction_program_interrupt); + } else { + unsigned64 zero = 0; + FPSCR_BEGIN; + if (is_NaN(*frA, 0) || is_less_than (frA, &zero)) *frT = *frB; + else *frT = *frC; + FPSCR_END(Rc); + PPC_INSN_FLOAT(FRT_BITMASK, FRA_BITMASK | FRB_BITMASK | FRC_BITMASK, Rc); + } # # II.3.2 Cache Management Instructions @@ -4355,7 +4773,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 *603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 *604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 1, 0 - cpu_synchronize_context(processor); + cpu_synchronize_context(processor, cia); PPC_INSN_INT(0, 0, 0); @@ -4451,7 +4869,8 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, | MASKED(SRR1, 37, 41) | MASKED(SRR1, 48, 63)); NIA = MASKED(SRR0, 0, 61); - cpu_synchronize_context(processor); + cpu_synchronize_context(processor, cia); + check_masked_interrupts(processor); } # @@ -4468,8 +4887,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, if (IS_PROBLEM_STATE(processor)) program_interrupt(processor, cia, privileged_instruction_program_interrupt); - else + else { MSR = *rS; + check_masked_interrupts(processor); + } 0.31,6.RT,11./,16./,21.83,31./:X:::Move From Machine State Register *601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 @@ -4479,8 +4900,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, if (IS_PROBLEM_STATE(processor)) program_interrupt(processor, cia, privileged_instruction_program_interrupt); - else + else { *rT = MSR; + check_masked_interrupts(processor); + } # @@ -4556,11 +4979,37 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, 0.31,6./,11./,16./,21.498,31./:X:64::SLB Invalidate All 0.31,6./,11./,16.RB,21.306,31./:X:::TLB Invalidate Entry + if (IS_PROBLEM_STATE(processor)) + program_interrupt(processor, cia, + privileged_instruction_program_interrupt); + else { + int nr = 0; + cpu *proc; + while (1) { + proc = psim_cpu(cpu_system(processor), nr); + if (proc == NULL) break; + cpu_page_tlb_invalidate_entry(proc, *rB); + nr++; + } + } 0.31,6./,11./,16./,21.370,31./:X:::TLB Invalidate All + if (IS_PROBLEM_STATE(processor)) + program_interrupt(processor, cia, + privileged_instruction_program_interrupt); + else { + int nr = 0; + cpu *proc; + while (1) { + proc = psim_cpu(cpu_system(processor), nr); + if (proc == NULL) break; + cpu_page_tlb_invalidate_all(proc); + nr++; + } + } -0.31,6./,11./,16./,21.566,31./:X:::TLB Sychronize - +0.31,6./,11./,16./,21.566,31./:X:::TLB Synchronize + /* nothing happens here - always in sync */ # # III.A.1.2 External Access Instructions @@ -4569,3 +5018,6 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, 0.31,6.RT,11.RA,16.RB,21.310,31./:X:earwax::External Control In Word Indexed 0.31,6.RS,11.RA,16.RB,21.438,31./:X:earwax::External Control Out Word Indexed + +:include:::altivec.igen +:include:::e500.igen