X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Frl78%2FChangeLog;h=29591873dcfdc5c7ae75c8ad79d3221e2266f6ff;hb=99d8e879938c947588332a9cc579d378ccc2a855;hp=d515328659b2842fac3c78f2a26249628fa895f3;hpb=bf12d44ee075e694a2b0dca87b9e9ca0e685d319;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/rl78/ChangeLog b/sim/rl78/ChangeLog index d515328659..29591873dc 100644 --- a/sim/rl78/ChangeLog +++ b/sim/rl78/ChangeLog @@ -1,3 +1,63 @@ +2016-01-10 Mike Frysinger + + * configure: Regenerate. + +2016-01-10 Mike Frysinger + + * configure: Regenerate. + +2016-01-10 Mike Frysinger + + * configure: Regenerate. + +2016-01-10 Mike Frysinger + + * configure: Regenerate. + +2016-01-09 Mike Frysinger + + * config.in, configure: Regenerate. + +2016-01-06 Mike Frysinger + + * gdb-if.c (sim_open): Mark argv const. + (sim_create_inferior): Mark argv and env const. + +2016-01-04 Mike Frysinger + + * configure: Regenerate. + +2016-01-03 Mike Frysinger + + * config.in, configure: Regenerate. + +2015-12-26 Mike Frysinger + + * config.in, configure: Regenerate. + +2015-06-23 Mike Frysinger + + * configure: Regenerate. + +2015-06-12 Mike Frysinger + + * configure: Regenerate. + +2015-06-12 Mike Frysinger + + * configure: Regenerate. + +2015-04-30 DJ Delorie + + * cpu.c (g14_multiply): New. + * cpu.h (g14_multiply): New. + * load.c (rl78_load): Decode ISA completely. + * main.c (main): Expand -M to include other ISAs. + * rl78.c (decode_opcode): Decode based on ISA. + * trace.c (rl78_disasm_fn): New. + (sim_disasm_init): Reset it. + (sim_disasm_one): Get correct disassembler for ISA. + 2015-04-13 Mike Frysinger * configure: Regenerate. @@ -71,7 +131,7 @@ PR gdb/7205 - Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout. + Replace TARGET_SIGNAL_ with GDB_SIGNAL_ throughout. 2012-03-24 Mike Frysinger