X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fsh%2FChangeLog;h=0e8731d14914a27a99a08e4d126b77083afbea92;hb=9c082ca86eb4262078f359850ae4466856f156a1;hp=549e49976ba026e477e6c1ed277b0b9ee6a60a8e;hpb=915213a4d58b9181d6dbdb21cb283e19ed8de096;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/sh/ChangeLog b/sim/sh/ChangeLog index 549e49976b..0e8731d149 100644 --- a/sim/sh/ChangeLog +++ b/sim/sh/ChangeLog @@ -1,3 +1,175 @@ +2011-10-17 Mike Frysinger + + * configure.ac: Change include to common/acinclude.m4. + +2011-10-17 Mike Frysinger + + * configure.ac: Change AC_PREREQ to 2.64. Delete AC_CONFIG_HEADER + call. Replace common.m4 include with SIM_AC_COMMON. + * configure: Regenerate. + +2011-04-16 Mike Frysinger + + * interp.c (sim_complete_command): New stub function. + +2010-04-14 Mike Frysinger + + * interp.c (sim_write): Add const to buffer arg. + +2010-01-12 Masaki Muranaka + + * interp.c: Don't include sysdep.h. + Include stdio.h and errno.h. + Include string.h strings.h stdlib.h sys/stat.h if present. + +2010-01-09 Ralf Wildenhues + + * configure: Regenerate. + +2009-08-22 Ralf Wildenhues + + * config.in: Regenerate. + * configure: Likewise. + + * configure: Regenerate. + +2008-07-11 Hans-Peter Nilsson + + * configure: Regenerate to track ../common/common.m4 changes. + * config.in: Ditto. + +2008-06-06 Vladimir Prus + Daniel Jacobowitz + Joseph Myers + + * configure: Regenerate. + +2008-02-04 Antony King + + * interp.c (macl): Fix non-portable implementation. + +2007-10-08 Andrew Stubbs + + * gencode.c (tab): Add RAISE_EXCEPTION_IF_IN_DELAY_SLOT to the + definition of PC relative 'mov.l'/'mov.w' and also 'mova'. + +2007-03-02 Andrew Stubbs + + * gencode.c (tab): Correct pre-decrement instructions when m == n. + +2006-12-21 Hans-Peter Nilsson + + * acconfig.h: Remove. + * config.in: Regenerate. + +2006-06-13 Richard Earnshaw + + * configure: Regenerated. + +2006-06-05 Daniel Jacobowitz + + * configure: Regenerated. + +2006-05-31 Daniel Jacobowitz + + * configure: Regenerated. + +2005-11-10 Andrew Stubbs + + * interp.c (sim_memory_size): Use same amount of memory on Windows as + elsewhere. + +2005-09-19 J"orn Rennecke + + * interp.c (): Include. + (mcalloc): New function / macro. + (mfree): New macro. + (sim_size): Use mcalloc and mfree. + +2005-08-02 J"orn Rennecke + + * interp.c (strswaplen): Add one for '\0' delimiter. + +2005-06-16 Daniel Jacobowitz + + * gencode.c (tab): Avoid lvalue casts. Suggested by + Ralf Corsepius . + +2005-04-12 Jonathan Larmour + + * gencode.c (tab): Avoid inserting code before variables all declared. + +2005-03-23 Mark Kettenis + + * configure: Regenerate. + +2005-01-14 Andrew Cagney + + * configure.ac: Sinclude aclocal.m4 before common.m4. Add + explicit call to AC_CONFIG_HEADER. + * configure: Regenerate. + +2005-01-12 Andrew Cagney + + * configure.ac: Update to use ../common/common.m4. + * configure: Re-generate. + +2005-01-11 Andrew Cagney + + * configure: Regenerated to track ../common/aclocal.m4 changes. + +2005-01-07 Andrew Cagney + + * configure.ac: Rename configure.in, require autoconf 2.59. + * configure: Re-generate. + +2004-12-08 Hans-Peter Nilsson + + * configure: Regenerate for ../common/aclocal.m4 update. + +2004-09-08 DJ Delorie + + Commited by Corinna Vinschen + * gencode.c (movua.l): Compensate for endianness. + +2004-09-08 Corinna Vinschen + + * interp.c (RAISE_EXCEPTION_IF_IN_DELAY_SLOT): New macro. + (in_delay_slot): New flag variable. + (Delay_Slot): Set in_delay_slot. + (sim_resume): Reset in_delay_slot after leaving code switch. + * gencode.c (op tab): Call RAISE_EXCEPTION_IF_IN_DELAY_SLOT for all + instructions not allowed in delay slots. + +2004-09-08 Michael Snyder + + Commited by Corinna Vinschen + Introduce SH2a support. + * interp.c: Change type of jump table to short. Add various macros. + (sim_load): Save the bfd machine code. + (sim_create_inferior): Ditto. + (union saved_state_type): Add tbr, ibnr and ibcr registers. + Move bfd_mach to end of struct. Add regstack pointer. + (init_dsp): Don't swap contents of sh_dsp_table any more. Instead + use it directly in its own switch statement. Allocate space for 512 + register banks. + (do_long_move_insn): New function. + (do_blog_insn): Ditto. + (trap): Use trap #13 and trap #14 to set ibnr and ibcr. + * gencode.c: Move movx/movy insns into separate switch statement. + (op tab): Add sh2a insns. Reject instructions that are disabled + on that chip. + (gensim_caselist): Generate default case here instead of in caller. + (gensim): Generate two separate switch statements. Call + gensim_caselist once for each (for movsxy_tab and for tab). + Add tokens for r15 and multiple regs. + (conflict_warn, warn_conflicts): Add for debugging. + +2004-08-18 J"orn Rennecke + + * gencode.c (tab): For shad snd shld, fix result for + (op1 < 0 && shift_amount == 0). + 2004-02-02 Michael Snyder * gencode.c (movua.l): Set thislock to 0, not n.