X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fsh64%2Fsh64.c;h=c35b5c1d2a1872a777a0de2619b2a0c4b96bcde4;hb=d47f5b30d8481272e9480118bdcb283690070349;hp=b376ae4738770fb1e22f2159baa2ffa4f1628f26;hpb=c5a570810022466eaa5e077cd1b8aa00d74706f1;p=deliverable%2Fbinutils-gdb.git

diff --git a/sim/sh64/sh64.c b/sim/sh64/sh64.c
index b376ae4738..c35b5c1d2a 100644
--- a/sim/sh64/sh64.c
+++ b/sim/sh64/sh64.c
@@ -1,6 +1,5 @@
 /* SH5 simulator support code
-   Copyright (C) 2000-2001, 2006, 2008-2012 Free Software Foundation,
-   Inc.
+   Copyright (C) 2000-2016 Free Software Foundation, Inc.
    Contributed by Red Hat, Inc.
 
 This file is part of the GNU simulators.
@@ -1031,7 +1030,7 @@ sh64_model_init()
   /* Do nothing.  */
 }
 
-static const MODEL sh_models [] =
+static const SIM_MODEL sh_models [] =
 {
   { "sh2",        & sh2_mach,         MODEL_SH5, NULL, sh64_model_init },
   { "sh2e",       & sh2e_mach,        MODEL_SH5, NULL, sh64_model_init },
@@ -1048,7 +1047,7 @@ static const MODEL sh_models [] =
   { 0 }
 };
 
-static const MACH_IMP_PROPERTIES sh5_imp_properties =
+static const SIM_MACH_IMP_PROPERTIES sh5_imp_properties =
 {
   sizeof (SIM_CPU),
 #if WITH_SCACHE
@@ -1058,7 +1057,7 @@ static const MACH_IMP_PROPERTIES sh5_imp_properties =
 #endif
 };
 
-const MACH sh2_mach =
+const SIM_MACH sh2_mach =
 {
   "sh2", "sh2", MACH_SH5,
   16, 16, &sh_models[0], &sh5_imp_properties,
@@ -1066,7 +1065,7 @@ const MACH sh2_mach =
   sh64_prepare_run
 };
 
-const MACH sh2e_mach =
+const SIM_MACH sh2e_mach =
 {
   "sh2e", "sh2e", MACH_SH5,
   16, 16, &sh_models[1], &sh5_imp_properties,
@@ -1074,7 +1073,7 @@ const MACH sh2e_mach =
   sh64_prepare_run
 };
 
-const MACH sh2a_fpu_mach =
+const SIM_MACH sh2a_fpu_mach =
 {
   "sh2a", "sh2a", MACH_SH5,
   16, 16, &sh_models[2], &sh5_imp_properties,
@@ -1082,7 +1081,7 @@ const MACH sh2a_fpu_mach =
   sh64_prepare_run
 };
 
-const MACH sh2a_nofpu_mach =
+const SIM_MACH sh2a_nofpu_mach =
 {
   "sh2a_nofpu", "sh2a_nofpu", MACH_SH5,
   16, 16, &sh_models[3], &sh5_imp_properties,
@@ -1090,7 +1089,7 @@ const MACH sh2a_nofpu_mach =
   sh64_prepare_run
 };
 
-const MACH sh3_mach =
+const SIM_MACH sh3_mach =
 {
   "sh3", "sh3", MACH_SH5,
   16, 16, &sh_models[4], &sh5_imp_properties,
@@ -1098,7 +1097,7 @@ const MACH sh3_mach =
   sh64_prepare_run
 };
 
-const MACH sh3e_mach =
+const SIM_MACH sh3e_mach =
 {
   "sh3e", "sh3e", MACH_SH5,
   16, 16, &sh_models[5], &sh5_imp_properties,
@@ -1106,7 +1105,7 @@ const MACH sh3e_mach =
   sh64_prepare_run
 };
 
-const MACH sh4_mach =
+const SIM_MACH sh4_mach =
 {
   "sh4", "sh4", MACH_SH5,
   16, 16, &sh_models[6], &sh5_imp_properties,
@@ -1114,7 +1113,7 @@ const MACH sh4_mach =
   sh64_prepare_run
 };
 
-const MACH sh4_nofpu_mach =
+const SIM_MACH sh4_nofpu_mach =
 {
   "sh4_nofpu", "sh4_nofpu", MACH_SH5,
   16, 16, &sh_models[7], &sh5_imp_properties,
@@ -1122,7 +1121,7 @@ const MACH sh4_nofpu_mach =
   sh64_prepare_run
 };
 
-const MACH sh4a_mach =
+const SIM_MACH sh4a_mach =
 {
   "sh4a", "sh4a", MACH_SH5,
   16, 16, &sh_models[8], &sh5_imp_properties,
@@ -1130,7 +1129,7 @@ const MACH sh4a_mach =
   sh64_prepare_run
 };
 
-const MACH sh4a_nofpu_mach =
+const SIM_MACH sh4a_nofpu_mach =
 {
   "sh4a_nofpu", "sh4a_nofpu", MACH_SH5,
   16, 16, &sh_models[9], &sh5_imp_properties,
@@ -1138,7 +1137,7 @@ const MACH sh4a_nofpu_mach =
   sh64_prepare_run
 };
 
-const MACH sh4al_mach =
+const SIM_MACH sh4al_mach =
 {
   "sh4al", "sh4al", MACH_SH5,
   16, 16, &sh_models[10], &sh5_imp_properties,
@@ -1146,7 +1145,7 @@ const MACH sh4al_mach =
   sh64_prepare_run
 };
 
-const MACH sh5_mach =
+const SIM_MACH sh5_mach =
 {
   "sh5", "sh5", MACH_SH5,
   32, 32, &sh_models[11], &sh5_imp_properties,