X-Git-Url: http://drtracing.org/?a=blobdiff_plain;f=sim%2Fv850%2FMakefile.in;h=16dab65df46776d395f600161680498e87bc85d2;hb=17fc27167f678285d2f64040837b8cc41b6a664a;hp=f067eb68e4c6f043e427da69d9f76ef61a354b3c;hpb=da3a66e5ca77e7c0c33957631800f237f05bafcb;p=deliverable%2Fbinutils-gdb.git diff --git a/sim/v850/Makefile.in b/sim/v850/Makefile.in index f067eb68e4..16dab65df4 100644 --- a/sim/v850/Makefile.in +++ b/sim/v850/Makefile.in @@ -1,73 +1,120 @@ # Makefile template for Configure for the V850 sim library. -# Copyright (C) 1996, 1997 Free Software Foundation, Inc. +# Copyright (C) 1996-2020 Free Software Foundation, Inc. # Written by Cygnus Support. # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2 of the License, or +# the Free Software Foundation; either version 3 of the License, or # (at your option) any later version. -# +# # This program is distributed in the hope that it will be useful, # but WITHOUT ANY WARRANTY; without even the implied warranty of # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the # GNU General Public License for more details. -# +# # You should have received a copy of the GNU General Public License -# along with this program; if not, write to the Free Software -# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. +# along with this program. If not, see . + +SHELL = @SHELL@ ## COMMON_PRE_CONFIG_FRAG -SIM_OBJS = interp.o table.o simops.o \ - sim-config.o \ - sim-core.o \ - sim-engine.o \ - sim-endian.o \ - sim-events.o \ - sim-hload.o \ - sim-hrw.o \ - sim-io.o \ - sim-load.o \ - sim-memopt.o \ - sim-module.o \ - sim-options.o \ - sim-profile.o \ - sim-trace.o \ - sim-utils.o -SIM_RUN_OBJS = nrun.o +SIM_OBJS = \ + $(SIM_NEW_COMMON_OBJS) \ + simops.o interp.o \ + itable.o semantics.o idecode.o icache.o engine.o irun.o support.o \ + sim-resume.o + +# List of extra dependencies. +# Generally this consists of simulator specific files included by sim-main.h. +SIM_EXTRA_DEPS = v850_sim.h sim-main.h simops.h itable.h # List of flags to always pass to $(CC) -SIM_WARNINGS=@sim_warnings@ -SIM_ENDIAN=@sim_endian@ -SIM_HOSTENDIAN=@sim_hostendian@ -SIM_EXTRA_CFLAGS = -I$(srcdir)/../../newlib/libc/sys/sysnecv850 \ - $(SIM_WARNINGS) \ - $(SIM_ENDIAN) \ - $(SIM_HOSTENDIAN) +SIM_EXTRA_CFLAGS = \ + -DDEBUG \ + -I$(srcdir)/../../newlib/libc/sys/sysnecv850 SIM_EXTRA_CLEAN = clean-extra -INCLUDE = v850_sim.h sim-main.h $(srcdir)/../../include/callback.h +INCLUDE = $(sim_main_headers) $(SIM_EXTRA_DEPS) -## COMMON_POST_CONFIG_FRAG +NL_TARGET = -DNL_TARGET_v850 -simops.h: gencode - ./gencode -h >$@ +## COMMON_POST_CONFIG_FRAG -table.c: gencode simops.h - ./gencode >$@ +BUILT_SRC_FROM_IGEN = \ + icache.h \ + icache.c \ + idecode.h \ + idecode.c \ + semantics.h \ + semantics.c \ + model.h \ + model.c \ + support.h \ + support.c \ + itable.h \ + itable.c \ + engine.h \ + engine.c \ + irun.c +$(BUILT_SRC_FROM_IGEN): tmp-igen +# -gencode.o: gencode.c $(INCLUDE) - $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $(srcdir)/gencode.c +.PHONY: clean-igen +clean-igen: + rm -f $(BUILT_SRC_FROM_IGEN) + rm -f tmp-igen tmp-insns -v850-opc.o: $(srcdir)/../../opcodes/v850-opc.c - $(CC_FOR_BUILD) $(BUILD_CFLAGS) -c $< +../igen/igen: + cd ../igen && $(MAKE) -gencode: gencode.o v850-opc.o - $(CC_FOR_BUILD) $(BUILD_CFLAGS) -o gencode gencode.o v850-opc.o +IGEN_TRACE= # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries +IGEN_INSN=$(srcdir)/v850.igen +IGEN_DC=$(srcdir)/v850-dc +tmp-igen: $(IGEN_INSN) $(IGEN_DC) ../igen/igen + cd ../igen && $(MAKE) + ../igen/igen \ + $(IGEN_TRACE) \ + -G gen-direct-access \ + -G gen-zero-r0 \ + -i $(IGEN_INSN) \ + -o $(IGEN_DC) \ + -x \ + -n icache.h -hc tmp-icache.h \ + -n icache.c -c tmp-icache.c \ + -n semantics.h -hs tmp-semantics.h \ + -n semantics.c -s tmp-semantics.c \ + -n idecode.h -hd tmp-idecode.h \ + -n idecode.c -d tmp-idecode.c \ + -n model.h -hm tmp-model.h \ + -n model.c -m tmp-model.c \ + -n support.h -hf tmp-support.h \ + -n support.c -f tmp-support.c \ + -n itable.h -ht tmp-itable.h \ + -n itable.c -t tmp-itable.c \ + -n engine.h -he tmp-engine.h \ + -n engine.c -e tmp-engine.c \ + -n irun.c -r tmp-irun.c + $(SHELL) $(srcdir)/../../move-if-change tmp-icache.h icache.h + $(SHELL) $(srcdir)/../../move-if-change tmp-icache.c icache.c + $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.h idecode.h + $(SHELL) $(srcdir)/../../move-if-change tmp-idecode.c idecode.c + $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.h semantics.h + $(SHELL) $(srcdir)/../../move-if-change tmp-semantics.c semantics.c + $(SHELL) $(srcdir)/../../move-if-change tmp-model.h model.h + $(SHELL) $(srcdir)/../../move-if-change tmp-model.c model.c + $(SHELL) $(srcdir)/../../move-if-change tmp-support.h support.h + $(SHELL) $(srcdir)/../../move-if-change tmp-support.c support.c + $(SHELL) $(srcdir)/../../move-if-change tmp-itable.h itable.h + $(SHELL) $(srcdir)/../../move-if-change tmp-itable.c itable.c + $(SHELL) $(srcdir)/../../move-if-change tmp-engine.h engine.h + $(SHELL) $(srcdir)/../../move-if-change tmp-engine.c engine.c + $(SHELL) $(srcdir)/../../move-if-change tmp-irun.c irun.c + touch tmp-igen -clean-extra: +clean-extra: clean-igen rm -f table.c simops.h gencode -interp.o: interp.c table.c $(INCLUDE) -simops.o: simops.c $(INCLUDE) -table.o: table.c +interp.o: interp.c $(INCLUDE) +simops.o: simops.c simops.h $(INCLUDE) targ-vals.h +semantics.o: $(INCLUDE)