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ARM: Add platform support for LSI AXM55xx SoC
authorAnders Berg <anders.berg@lsi.com>
Fri, 23 May 2014 09:08:35 +0000 (11:08 +0200)
committerArnd Bergmann <arnd@arndb.de>
Fri, 23 May 2014 16:18:39 +0000 (18:18 +0200)
commit1d22924e1c4e299337e86e290c02c3e3eb43b608
tree53ebde5a7a8bef8e3ac50be57733505110b287batree | snapshot
parenta798c10faf62a505d24e5f6213fbaf904a39623fcommit | diff
ARM: Add platform support for LSI AXM55xx SoC

The AXM55xx family consists of devices that may contain up to 16 ARM Cortex-A15
cores (in a 4x4 cluster configuration). The cores within each cluster share an
L2 cache, and the clusters are connected to each other via a CCN-504 cache
coherent interconnect.

This machine requires CONFIG_ARM_LPAE enabled as all peripherals are located
above 4GB in the memory map.

Signed-off-by: Anders Berg <anders.berg@lsi.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Documentation/devicetree/bindings/arm/axxia.txt [new file with mode: 0644] blob
arch/arm/Kconfig diff | blob | blame | history
arch/arm/Makefile diff | blob | blame | history
arch/arm/mach-axxia/Kconfig [new file with mode: 0644] blob
arch/arm/mach-axxia/Makefile [new file with mode: 0644] blob
arch/arm/mach-axxia/axxia.c [new file with mode: 0644] blob
arch/arm/mach-axxia/platsmp.c [new file with mode: 0644] blob
include/dt-bindings/clock/lsi,axm5516-clks.h [new file with mode: 0644] blob
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