MIPS: Octeon: Setup irq_domains for interrupts.
authorDavid Daney <david.daney@cavium.com>
Thu, 5 Jul 2012 16:12:39 +0000 (18:12 +0200)
committerRalf Baechle <ralf@linux-mips.org>
Mon, 23 Jul 2012 12:54:53 +0000 (13:54 +0100)
commita0c16582b5b50792b0fd3e07d23c537936fafcb7
tree0c063bc5c775115fdd2d6709971d61151b807ace
parent7ed1815296498e9d1bfa1f13e94b743364b14caf
MIPS: Octeon: Setup irq_domains for interrupts.

Create two domains.  One for the GPIO lines, and the other for on-chip
sources.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Grant Likely <grant.likely@secretlab.ca>
Cc: Rob Herring <rob.herring@calxeda.com>
Cc: linux-kernel@vger.kernel.org
Cc: David Daney <david.daney@cavium.com>
Patchwork: https://patchwork.linux-mips.org/patch/3936/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/cavium-octeon/octeon-irq.c
This page took 0.026105 seconds and 5 git commands to generate.