MIPS: Octeon: Update SOC PCI related register definitions for new chips.
authorDavid Daney <david.daney@cavium.com>
Tue, 22 Nov 2011 14:47:03 +0000 (14:47 +0000)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 7 Dec 2011 22:03:29 +0000 (22:03 +0000)
commit412394d10447d585ded3eab85da34381c117d782
tree41fd5819ef18974eb0b29bba614d7cd620d281fa
parent37d3bfd9927a8c509d31eac1036b2c3c905f8241
MIPS: Octeon: Update SOC PCI related register definitions for new chips.

Signed-off-by: David Daney <david.daney@cavium.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2986/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/octeon/cvmx-dpi-defs.h [new file with mode: 0644]
arch/mips/include/asm/octeon/cvmx-npei-defs.h
arch/mips/include/asm/octeon/cvmx-pciercx-defs.h
arch/mips/include/asm/octeon/cvmx-pemx-defs.h [new file with mode: 0644]
arch/mips/include/asm/octeon/cvmx-pexp-defs.h
arch/mips/include/asm/octeon/cvmx-sli-defs.h [new file with mode: 0644]
arch/mips/include/asm/octeon/cvmx-sriox-defs.h [new file with mode: 0644]
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