EDAC, altera: Add panic flag check to A10 IRQ
authorThor Thayer <tthayer@opensource.altera.com>
Wed, 22 Jun 2016 13:58:53 +0000 (08:58 -0500)
committerBorislav Petkov <bp@suse.de>
Fri, 24 Jun 2016 09:58:43 +0000 (11:58 +0200)
commit2b083d65ff11e02b967d9f6e68aea7722eba9ea4
tree1e3259cd887fbf4860fca38b6e515575b4796d67
parent44ec9b307ee7392fe187caa71fcb886526efde1d
EDAC, altera: Add panic flag check to A10 IRQ

In preparation for additional memory module ECCs, the IRQ function will
check a panic flag before doing a kernel panic on double bit errors.

OCRAM uncorrectable errors cause a panic because sleep/resume functions
and FPGA contents during sleep are stored in OCRAM.

ECCs on peripheral FIFO buffers will not cause a kernel panic on DBERRs
because the packet can be retried and therefore recovered.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1466603939-7526-3-git-send-email-tthayer@opensource.altera.com
Signed-off-by: Borislav Petkov <bp@suse.de>
drivers/edac/altera_edac.c
drivers/edac/altera_edac.h
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