drm/i915: Check DDI max lanes after applying BXT workaround
authorMatt Roper <matthew.d.roper@intel.com>
Thu, 28 Jan 2016 23:09:37 +0000 (15:09 -0800)
committerMatt Roper <matthew.d.roper@intel.com>
Wed, 3 Feb 2016 01:52:01 +0000 (17:52 -0800)
commited8d60f450d3db4c4dbb25eddc8f106cbab4bd1c
tree4bc5024da5ee5b13e92d4a06968f6d559120c424
parente1ea07542352be468e901173c7a1beeee404d696
drm/i915: Check DDI max lanes after applying BXT workaround

In commit bfb9faab8 we added a workaround for some BXT BIOS that fail to
properly initialize the DDI_A_4_LANES bit of the control register (4
lanes is the only valid configuration on BXT since there is no DDI E to
share with).  A recent patch added some additional checks on this
register bit before the workaround gets applied; this breaks eDP on BXT
in some settings.  Some minor code shuffling is all we need to restore
the workaround.

Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Fixes: 7cd87cb80 ("drm/i915: Check max number of lanes when registering DDI ports")
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1454022577-834-1-git-send-email-matthew.d.roper@intel.com
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
drivers/gpu/drm/i915/intel_ddi.c
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