drm/i915: Drop the 64k linear scanout alignment on gen2/3
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 11 Jun 2015 13:31:16 +0000 (16:31 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 15 Jun 2015 16:08:35 +0000 (18:08 +0200)
commit44c5905e8e977b1dd9bb99bcd5686464fa0aa247
tree41de9a4b74f34f2e9ff89b616d702f3649be71e2
parent985b8bb486e7dd924925898f86fffca546d698db
drm/i915: Drop the 64k linear scanout alignment on gen2/3

The docs don't support the 64k linear scanout alignment we impose
on gen2/3. And it really makes no sense since we have no DSPSURF
register, so the only thing that the hardware will see is the linear
offset which will be just pixel aligned anyway.

There is one case where 64k comes into the picture, and that's FBC.
The start of the line length buffer corresponds to a 64k aligned
address of the uncompressed framebuffer. So if the uncompressed fb is
not 64k aligned, the first actually used entry in the line length
buffer will not be byte 0. There are 32 extra entries in the line
length buffer to account for this extra alignment so we shouldn't
have to worry about it when mapping the uncompressed fb to the GTT.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c
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