drm/i915/bxt: Additional MIPI clock divider form B0 stepping onwards
authorDeepak M <m.deepak@intel.com>
Mon, 15 Feb 2016 17:13:57 +0000 (22:43 +0530)
committerJani Nikula <jani.nikula@intel.com>
Thu, 3 Mar 2016 13:05:52 +0000 (15:05 +0200)
commit782d25cac6373457b9a1c8a5efcd9194eb97ba80
treecbffda5302d4fda09eaf6dc71d4b9ffccf4f0f4d
parente3bddded40e23a4a40f4cc7df65180a6041646dd
drm/i915/bxt: Additional MIPI clock divider form B0 stepping onwards

The MIPI clock calculations for the addtional clock
are revised from B0 stepping onwards, the bit definitions
have changed compared to old stepping.

v2: Fixing compilation warning.
v3: Retained the old Macros (Jani)

Signed-off-by: Deepak M <m.deepak@intel.com>
Tested-by: Ramalingam C <ramalingam.c@intel.com> # BXT-T with Tianma panel
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1455556437-29267-1-git-send-email-m.deepak@intel.com
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_dsi_pll.c
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