drm/i915/chv: Handle video DIP registers on CHV
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Wed, 9 Apr 2014 10:29:09 +0000 (13:29 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Wed, 11 Jun 2014 14:57:32 +0000 (16:57 +0200)
commit2dcbc34d12ba463d5c0be5d96762911707844098
tree84fdcf743d17dab57de0eeb844cce3672c93f626
parent2d401b175f9026d839d3ad1cf444802c986c32bc
drm/i915/chv: Handle video DIP registers on CHV

The DIP registers are a mess on VLV and CHV. The register block on pipe
A is different than the register block on pipes B and C. In order to
handle that using the pipe offsets, we'd need a new pipe offset per
register, which seems wasteful. So instead just use the _PIPE3() macro
to handle these registers.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_reg.h
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