clk: zynq: Factor out PLL driver
authorSoren Brinkmann <soren.brinkmann@xilinx.com>
Mon, 13 May 2013 17:46:36 +0000 (10:46 -0700)
committerMichal Simek <michal.simek@xilinx.com>
Tue, 21 May 2013 14:21:35 +0000 (16:21 +0200)
commit3682af46d55f2c97898b9cc1c8c80afad81f62be
treedbf312bceb367cfd6dd0b3ad3c201879afe128f9
parentc7788792a5e7b0d5d7f96d0766b4cb6112d47d75
clk: zynq: Factor out PLL driver

Refactor the PLL driver so it works with the clock controller driver.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Mike Turquette <mturquette@linaro.org>
drivers/clk/zynq/pll.c [new file with mode: 0644]
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