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ARM: dts: socfpga: Add Altera Arria10 L2 Cache EDAC devicetree entry
authorThor Thayer <tthayer@opensource.altera.com>
Mon, 21 Mar 2016 16:01:46 +0000 (16:01 +0000)
committerDinh Nguyen <dinguyen@kernel.org>
Mon, 11 Apr 2016 19:03:08 +0000 (14:03 -0500)
commit64ded09d293932621aad94dddf6d14eb0690246a
tree51870ab79ef8acd25aacaf2f97438d594af66752tree | snapshot
parent95c16caaa8c1ffff2b58007da3989d7c470069ebcommit | diff
ARM: dts: socfpga: Add Altera Arria10 L2 Cache EDAC devicetree entry

Add the device tree entries needed to support the Altera L2
cache EDAC on the Arria10 chip.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
arch/arm/boot/dts/socfpga_arria10.dtsi diff | blob | blame | history
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