projects / deliverable / linux.git / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: 858ba70) | patch
ARM: CSR: add rtc i/o bridge interface for SiRFprimaII
authorZhiwu Song <zhiwu.song@csr.com>
Wed, 31 Aug 2011 02:20:34 +0000 (19:20 -0700)
committerBarry Song <21cnbao@gmail.com>
Sun, 11 Sep 2011 01:17:53 +0000 (09:17 +0800)
commit684f741446f7a3108b4c167faf20214c42b7eeac
tree7d6b2d4919640170f61aaaf5460e9b2a6dbb24cdtree | snapshot
parent858ba703e842f4ece6680b45862ee9e6e6297d1ecommit | diff
ARM: CSR: add rtc i/o bridge interface for SiRFprimaII

The module is a bridge between the RTC clock domain and the CPU interface
clock domain. ARM access the register of SYSRTC, GPSRTC and PWRC through
this module.

Signed-off-by: Zhiwu Song <zhiwu.song@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Reviewed-by: Jamie Iles <jamie@jamieiles.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
arch/arm/boot/dts/prima2-cb.dts diff | blob | blame | history
arch/arm/mach-prima2/Makefile diff | blob | blame | history
arch/arm/mach-prima2/rtciobrg.c [new file with mode: 0644] blob
include/linux/rtc/sirfsoc_rtciobrg.h [new file with mode: 0644] blob
Linux kernel - Deliverables
This page took 0.029411 seconds and 5 git commands to generate.