powerpc/85xx: Add PCIe controller support for bsc9132qds
authorHarninder Rai <harninder.rai@freescale.com>
Thu, 5 Nov 2015 03:16:00 +0000 (11:16 +0800)
committerScott Wood <scottwood@freescale.com>
Wed, 23 Dec 2015 00:17:15 +0000 (18:17 -0600)
commit720d7aebcdffda29aa71e12f3b806dbf3aa20761
treeea8205ec50561d4d1ca9e74d30259121274b4b71
parent230dd6059a97965de8464db293c3e852da395986
powerpc/85xx: Add PCIe controller support for bsc9132qds

1. Use machine_arch_initcall to hook mpc85xx_common_publish_devices
This can ensure before pcibios_init() is called, pci controllers have
been probed and added to the hose_list.
2. Add a workaround for errata A-005434
For the BSC9132, PEX_PEXIWARn[TRGT] for all windows defaults to 0xF,
which is mapped to CCSRBAR. However, for other products, 0xF is
mapped to the local memory. Therefore, for the BSC9132, any default
PCI Express access to the local memory (DDR) will now access the
CCSRBAR. This patch changes the mapping of targets of inbound windows
PEX_PEXIWARn[TRGT] to the Local address space – 0x0 (from 0xF).

Signed-off-by: Harninder Rai <harninder.rai@freescale.com>
Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com>
Signed-off-by: Hou Zhiqiang <B48286@freescale.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
arch/powerpc/platforms/85xx/bsc913x_qds.c
arch/powerpc/sysdev/fsl_pci.c
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