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clk: tegra: fix host1x clock on Tegra124
authorMark Zhang <markz@nvidia.com>
Fri, 27 Dec 2013 00:44:24 +0000 (16:44 -0800)
committerPeter De Schrijver <pdeschrijver@nvidia.com>
Mon, 17 Feb 2014 14:18:16 +0000 (16:18 +0200)
commit82ba1c3c9988a8055f4a4d7ca2168e9efe7e7874
tree0c9a829ca83489a35631d43e3f124bfcd35eb7d5tree | snapshot
parent0e766c2d9fc8cd2ad0e0fe97ff4e264cb686fc32commit | diff
clk: tegra: fix host1x clock on Tegra124

The host1x clock on Tegra124 is a 3-bit wide mux with 6 parents.
Change thte id to tegra_clk_host1x_8 so that the correct clock gets
registered.

Signed-off-by: Mark Zhang <markz@nvidia.com>
Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
drivers/clk/tegra/clk-tegra124.c diff | blob | blame | history
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