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irqchip: dw-apb-ictl: Enable IRQ_GC_MASK_CACHE_PER_TYPE
authorJisheng Zhang <jszhang@marvell.com>
Wed, 12 Nov 2014 06:22:53 +0000 (14:22 +0800)
committerJason Cooper <jason@lakedaemon.net>
Wed, 26 Nov 2014 16:07:54 +0000 (16:07 +0000)
commita9d5fcc00e715354d3fec1e8009c5895b5ba65ba
tree774242702aa8c77c309e4d07ed95ab3dab1abef2tree | snapshot
parent8876ce7d1cbaca495bd6dee96d371f98e9cfb1ebcommit | diff
irqchip: dw-apb-ictl: Enable IRQ_GC_MASK_CACHE_PER_TYPE

The irq_chip_type instances have separate mask registers, so we need to
enable IRQ_GC_MASK_CACHE_PER_TYPE to actually handle separate mask registers.

Signed-off-by: Jisheng Zhang <jszhang@marvell.com>
Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Link: https://lkml.kernel.org/r/1415773374-4629-3-git-send-email-jszhang@marvell.com
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
drivers/irqchip/irq-dw-apb-ictl.c diff | blob | blame | history
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