ASoC: rsnd: tidyup rsnd_ssi_master_clk_start() parameter
authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Fri, 20 Dec 2013 03:28:39 +0000 (19:28 -0800)
committerMark Brown <broonie@linaro.org>
Tue, 31 Dec 2013 13:35:31 +0000 (13:35 +0000)
commitadcf7d5e7605e8134a99d415b7afd13f03c4bf23
tree3b5154109ed3c148ea72c30328ee675e27a9503f
parent99feec32f26a3c267f89ce48db4bd36650a95f7f
ASoC: rsnd: tidyup rsnd_ssi_master_clk_start() parameter

Renesas sound has SRC (= Sampling Rate Converter),
but, the HW implementation depends on its generation.
It was part of SRU on Gen1, and SCU on Gen2.
This SCU needs DMA transfer to use it.
Current rsnd driver is using it as DMA transfer buffer
(= no rate convert), and Gen1 is only supported at this point.

This patch cleanup it with focusing about SRC and Gen2 part.

ssi clock which is calculated from rsnd_ssi_master_clk_start()
should have flexibility since Renesas sound has
SRC (= Sampling Rate Converter).
But current implementation is using runtime->rate directly.
This patch tidyup rsnd_ssi_master_clk_start() parameter
as preparation of future SRC support

Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
sound/soc/sh/rcar/ssi.c
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