coresight: fix handling of ETM trace register access via sysfs
authorSudeep Holla <sudeep.holla@arm.com>
Thu, 4 Aug 2016 16:22:26 +0000 (17:22 +0100)
committerMathieu Poirier <mathieu.poirier@linaro.org>
Tue, 6 Sep 2016 14:24:32 +0000 (08:24 -0600)
commitcfcf9f436fd82a7928381d5f063e01e443874615
treec5e158d264424161b40ddce2fa22bd8563ccca68
parent7690509fb1ef9c1021cbfb76222dfbac460e7088
coresight: fix handling of ETM trace register access via sysfs

The ETM registers are classified into 2 categories: trace and management.
The core power domain contains most of the trace unit logic including
all(except TRCOSLAR and TRCOSLSR) the trace registers. The debug power
domain contains the external debugger interface including all management
registers.

This patch adds coresight unit specific function coresight_simple_func
which can be used for ETM trace registers by providing a ETM specific
read function which does smp cross call to ensure the trace core is
powered up before the register is accessed.

Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
drivers/hwtracing/coresight/coresight-etb10.c
drivers/hwtracing/coresight/coresight-etm3x-sysfs.c
drivers/hwtracing/coresight/coresight-etm4x-sysfs.c
drivers/hwtracing/coresight/coresight-priv.h
drivers/hwtracing/coresight/coresight-stm.c
drivers/hwtracing/coresight/coresight-tmc.c
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