[PATCH] sl82c105: straighten up IDE control/status register caching
authorSergei Shtylyov <sshtylyov@ru.mvista.com>
Fri, 8 Dec 2006 10:40:01 +0000 (02:40 -0800)
committerLinus Torvalds <torvalds@woody.osdl.org>
Fri, 8 Dec 2006 16:29:03 +0000 (08:29 -0800)
commitdd607d23ff4cc004da2986d0b264a972c6a2da3e
tree5845b66acd8b2b6e9a1dc7d5964d5aaa3d00b669
parentb10a06866600d1eda9e72ff328999e70f077fb3a
[PATCH] sl82c105: straighten up IDE control/status register caching

Straighten up the IDE control/status register caching -- you *really* can't
cache the shared register per-channel and hope that it won't get out ouf
sync.

Set the PIO fallback mode to PIO0 for the slave drive as well as master --
there was no point in having them different (most probably a resutl of
typo).

Do a bit of reformat and cleanup while at it...

Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Acked-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
Cc: Bartlomiej Zolnierkiewicz <B.Zolnierkiewicz@elka.pw.edu.pl>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
drivers/ide/pci/sl82c105.c
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