+/* Enum declaration for general registers. */
+typedef enum h_gr {
+ H_GR_FP = 13, H_GR_LR = 14, H_GR_SP = 15, H_GR_R0 = 0
+ , H_GR_R1 = 1, H_GR_R2 = 2, H_GR_R3 = 3, H_GR_R4 = 4
+ , H_GR_R5 = 5, H_GR_R6 = 6, H_GR_R7 = 7, H_GR_R8 = 8
+ , H_GR_R9 = 9, H_GR_R10 = 10, H_GR_R11 = 11, H_GR_R12 = 12
+ , H_GR_R13 = 13, H_GR_R14 = 14, H_GR_R15 = 15
+} H_GR;
+
+/* Enum declaration for control registers. */
+typedef enum h_cr {
+ H_CR_PSW = 0, H_CR_CBR = 1, H_CR_SPI = 2, H_CR_SPU = 3
+ , H_CR_BPC = 6, H_CR_CR0 = 0, H_CR_CR1 = 1, H_CR_CR2 = 2
+ , H_CR_CR3 = 3, H_CR_CR4 = 4, H_CR_CR5 = 5, H_CR_CR6 = 6
+ , H_CR_CR7 = 7, H_CR_CR8 = 8, H_CR_CR9 = 9, H_CR_CR10 = 10
+ , H_CR_CR11 = 11, H_CR_CR12 = 12, H_CR_CR13 = 13, H_CR_CR14 = 14
+ , H_CR_CR15 = 15
+} H_CR;
+
+/* start-sanitize-m32rx */
+/* Enum declaration for accumulators. */
+typedef enum h_accums {
+ H_ACCUMS_A0, H_ACCUMS_A1
+} H_ACCUMS;
+
+/* end-sanitize-m32rx */