- WRB(devAddr, QAM_DQ_QUAL_FUN0__A, sizeof(qamDqQualFun),
- ((u8 *) qamDqQualFun));
- WRB(devAddr, SCU_RAM_QAM_EQ_CMA_RAD0__A, sizeof(qamEqCmaRad),
- ((u8 *) qamEqCmaRad));
-
- WR16(devAddr, SCU_RAM_QAM_FSM_RTH__A, 90);
- WR16(devAddr, SCU_RAM_QAM_FSM_FTH__A, 50);
- WR16(devAddr, SCU_RAM_QAM_FSM_PTH__A, 100);
- WR16(devAddr, SCU_RAM_QAM_FSM_QTH__A, 170);
- WR16(devAddr, SCU_RAM_QAM_FSM_CTH__A, 80);
- WR16(devAddr, SCU_RAM_QAM_FSM_MTH__A, 100);
-
- WR16(devAddr, SCU_RAM_QAM_FSM_RATE_LIM__A, 40);
- WR16(devAddr, SCU_RAM_QAM_FSM_FREQ_LIM__A, 56);
- WR16(devAddr, SCU_RAM_QAM_FSM_COUNT_LIM__A, 3);
-
- WR16(devAddr, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, 12);
- WR16(devAddr, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, 140);
- WR16(devAddr, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) (-8));
- WR16(devAddr, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) (-16));
- WR16(devAddr, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) (-26));
- WR16(devAddr, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) (-56));
- WR16(devAddr, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) (-86));
-
- WR16(devAddr, SCU_RAM_QAM_LC_CA_FINE__A, 15);
- WR16(devAddr, SCU_RAM_QAM_LC_CA_COARSE__A, 40);
- WR16(devAddr, SCU_RAM_QAM_LC_CP_FINE__A, 2);
- WR16(devAddr, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20);
- WR16(devAddr, SCU_RAM_QAM_LC_CP_COARSE__A, 255);
- WR16(devAddr, SCU_RAM_QAM_LC_CI_FINE__A, 2);
- WR16(devAddr, SCU_RAM_QAM_LC_CI_MEDIUM__A, 10);
- WR16(devAddr, SCU_RAM_QAM_LC_CI_COARSE__A, 50);
- WR16(devAddr, SCU_RAM_QAM_LC_EP_FINE__A, 12);
- WR16(devAddr, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24);
- WR16(devAddr, SCU_RAM_QAM_LC_EP_COARSE__A, 24);
- WR16(devAddr, SCU_RAM_QAM_LC_EI_FINE__A, 12);
- WR16(devAddr, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16);
- WR16(devAddr, SCU_RAM_QAM_LC_EI_COARSE__A, 16);
- WR16(devAddr, SCU_RAM_QAM_LC_CF_FINE__A, 16);
- WR16(devAddr, SCU_RAM_QAM_LC_CF_MEDIUM__A, 32);
- WR16(devAddr, SCU_RAM_QAM_LC_CF_COARSE__A, 176);
- WR16(devAddr, SCU_RAM_QAM_LC_CF1_FINE__A, 5);
- WR16(devAddr, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 15);
- WR16(devAddr, SCU_RAM_QAM_LC_CF1_COARSE__A, 8);
-
- WR16(devAddr, SCU_RAM_QAM_SL_SIG_POWER__A, 20480);
+ WRB(dev_addr, QAM_DQ_QUAL_FUN0__A, sizeof(qam_dq_qual_fun),
+ ((u8 *) qam_dq_qual_fun));
+ WRB(dev_addr, SCU_RAM_QAM_EQ_CMA_RAD0__A, sizeof(qam_eq_cma_rad),
+ ((u8 *) qam_eq_cma_rad));
+
+ WR16(dev_addr, SCU_RAM_QAM_FSM_RTH__A, 90);
+ WR16(dev_addr, SCU_RAM_QAM_FSM_FTH__A, 50);
+ WR16(dev_addr, SCU_RAM_QAM_FSM_PTH__A, 100);
+ WR16(dev_addr, SCU_RAM_QAM_FSM_QTH__A, 170);
+ WR16(dev_addr, SCU_RAM_QAM_FSM_CTH__A, 80);
+ WR16(dev_addr, SCU_RAM_QAM_FSM_MTH__A, 100);
+
+ WR16(dev_addr, SCU_RAM_QAM_FSM_RATE_LIM__A, 40);
+ WR16(dev_addr, SCU_RAM_QAM_FSM_FREQ_LIM__A, 56);
+ WR16(dev_addr, SCU_RAM_QAM_FSM_COUNT_LIM__A, 3);
+
+ WR16(dev_addr, SCU_RAM_QAM_FSM_MEDIAN_AV_MULT__A, 12);
+ WR16(dev_addr, SCU_RAM_QAM_FSM_RADIUS_AV_LIMIT__A, 140);
+ WR16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET1__A, (u16) (-8));
+ WR16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET2__A, (u16) (-16));
+ WR16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET3__A, (u16) (-26));
+ WR16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET4__A, (u16) (-56));
+ WR16(dev_addr, SCU_RAM_QAM_FSM_LCAVG_OFFSET5__A, (u16) (-86));
+
+ WR16(dev_addr, SCU_RAM_QAM_LC_CA_FINE__A, 15);
+ WR16(dev_addr, SCU_RAM_QAM_LC_CA_COARSE__A, 40);
+ WR16(dev_addr, SCU_RAM_QAM_LC_CP_FINE__A, 2);
+ WR16(dev_addr, SCU_RAM_QAM_LC_CP_MEDIUM__A, 20);
+ WR16(dev_addr, SCU_RAM_QAM_LC_CP_COARSE__A, 255);
+ WR16(dev_addr, SCU_RAM_QAM_LC_CI_FINE__A, 2);
+ WR16(dev_addr, SCU_RAM_QAM_LC_CI_MEDIUM__A, 10);
+ WR16(dev_addr, SCU_RAM_QAM_LC_CI_COARSE__A, 50);
+ WR16(dev_addr, SCU_RAM_QAM_LC_EP_FINE__A, 12);
+ WR16(dev_addr, SCU_RAM_QAM_LC_EP_MEDIUM__A, 24);
+ WR16(dev_addr, SCU_RAM_QAM_LC_EP_COARSE__A, 24);
+ WR16(dev_addr, SCU_RAM_QAM_LC_EI_FINE__A, 12);
+ WR16(dev_addr, SCU_RAM_QAM_LC_EI_MEDIUM__A, 16);
+ WR16(dev_addr, SCU_RAM_QAM_LC_EI_COARSE__A, 16);
+ WR16(dev_addr, SCU_RAM_QAM_LC_CF_FINE__A, 16);
+ WR16(dev_addr, SCU_RAM_QAM_LC_CF_MEDIUM__A, 32);
+ WR16(dev_addr, SCU_RAM_QAM_LC_CF_COARSE__A, 176);
+ WR16(dev_addr, SCU_RAM_QAM_LC_CF1_FINE__A, 5);
+ WR16(dev_addr, SCU_RAM_QAM_LC_CF1_MEDIUM__A, 15);
+ WR16(dev_addr, SCU_RAM_QAM_LC_CF1_COARSE__A, 8);
+
+ WR16(dev_addr, SCU_RAM_QAM_SL_SIG_POWER__A, 20480);