This patch eliminates the global gpio_lock, and implements a per-controller
lock instead. This also switches to irqsave/irqrestore locks in case gpios
are manipulated in isr.
Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Tested-by: Sandeep Paulraj <s-paulraj@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
-static DEFINE_SPINLOCK(gpio_lock);
-
#define chip2controller(chip) \
container_of(chip, struct davinci_gpio_controller, chip)
#define chip2controller(chip) \
container_of(chip, struct davinci_gpio_controller, chip)
{
struct davinci_gpio_controller *d = chip2controller(chip);
struct davinci_gpio_regs __iomem *g = d->regs;
{
struct davinci_gpio_controller *d = chip2controller(chip);
struct davinci_gpio_regs __iomem *g = d->regs;
u32 temp;
u32 mask = 1 << offset;
u32 temp;
u32 mask = 1 << offset;
+ spin_lock_irqsave(&d->lock, flags);
temp = __raw_readl(&g->dir);
if (out) {
temp &= ~mask;
temp = __raw_readl(&g->dir);
if (out) {
temp &= ~mask;
temp |= mask;
}
__raw_writel(temp, &g->dir);
temp |= mask;
}
__raw_writel(temp, &g->dir);
- spin_unlock(&gpio_lock);
+ spin_unlock_irqrestore(&d->lock, flags);
if (chips[i].chip.ngpio > 32)
chips[i].chip.ngpio = 32;
if (chips[i].chip.ngpio > 32)
chips[i].chip.ngpio = 32;
+ spin_lock_init(&chips[i].lock);
+
regs = gpio2regs(base);
chips[i].regs = regs;
chips[i].set_data = ®s->set_data;
regs = gpio2regs(base);
chips[i].regs = regs;
chips[i].set_data = ®s->set_data;
#define __DAVINCI_GPIO_H
#include <linux/io.h>
#define __DAVINCI_GPIO_H
#include <linux/io.h>
+#include <linux/spinlock.h>
+
#include <asm-generic/gpio.h>
#include <mach/irqs.h>
#include <asm-generic/gpio.h>
#include <mach/irqs.h>
struct davinci_gpio_controller {
struct gpio_chip chip;
int irq_base;
struct davinci_gpio_controller {
struct gpio_chip chip;
int irq_base;
void __iomem *regs;
void __iomem *set_data;
void __iomem *clr_data;
void __iomem *regs;
void __iomem *set_data;
void __iomem *clr_data;