Add -no-bitinst switch for M32R2

diff --git a/gas/ChangeLog b/gas/ChangeLog
index e41ed52920d28248f4ffc67f10107534ac62bbe2..ba6c6ec363843b389d0be85ec6ad366f6681a8db 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,12 @@
+2004-02-27  Kazuhiro Inaoka  <inaoka.kazuhiro@renesas.com>
+
+       * config/tc-m32r.c (md_longopts): Added -no-bitinst option.
+       (md_parse_option): Ditto.
+       (OPTION_NO_SPECIAL_M32R): Added.
+       (md_show_usage): Document it.
+       (enable_speial_m32r): Changed a default value from 0 to 1.
+       * doc/c-m32r.texi: Document the -no-bitinst option.
+

 2004-02-27  Nick Clifton  <nickc@redhat.com>
 
        * config/tc-sh.c (get_operand): Revert previous delta.
 2004-02-27  Nick Clifton  <nickc@redhat.com>
 
        * config/tc-sh.c (get_operand): Revert previous delta.

diff --git a/gas/config/tc-m32r.c b/gas/config/tc-m32r.c
index fb1c61354fba19563f9565ff7768487c2739bbc4..7b01516c71f455955781b58c8770e296607df090 100644 (file)
--- a/gas/config/tc-m32r.c
+++ b/gas/config/tc-m32r.c
@@ -1,5 +1,5 @@
 /* tc-m32r.c -- Assembler for the Renesas M32R.
 /* tc-m32r.c -- Assembler for the Renesas M32R.

-   Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
+   Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004

    Free Software Foundation, Inc.
 
    This file is part of GAS, the GNU Assembler.
    Free Software Foundation, Inc.
 
    This file is part of GAS, the GNU Assembler.


@@ -109,7 +109,7 @@ static int enable_special = 0;
 
 /* Non-zero if -bitinst has been specified, in which case support
    for extended M32R bit-field instruction set should be enabled.  */
 
 /* Non-zero if -bitinst has been specified, in which case support
    for extended M32R bit-field instruction set should be enabled.  */

-static int enable_special_m32r = 0;
+static int enable_special_m32r = 1;

 
 /* Non-zero if -float has been specified, in which case support for
    extended M32R floating point instruction set should be enabled.  */
 
 /* Non-zero if -float has been specified, in which case support for
    extended M32R floating point instruction set should be enabled.  */


@@ -216,7 +216,8 @@ struct option md_longopts[] =
 #define OPTION_NO_IGNORE_PARALLEL (OPTION_IGNORE_PARALLEL + 1)
 #define OPTION_SPECIAL           (OPTION_NO_IGNORE_PARALLEL + 1)
 #define OPTION_SPECIAL_M32R       (OPTION_SPECIAL + 1)
 #define OPTION_NO_IGNORE_PARALLEL (OPTION_IGNORE_PARALLEL + 1)
 #define OPTION_SPECIAL           (OPTION_NO_IGNORE_PARALLEL + 1)
 #define OPTION_SPECIAL_M32R       (OPTION_SPECIAL + 1)

-#define OPTION_SPECIAL_FLOAT      (OPTION_SPECIAL_M32R + 1)
+#define OPTION_NO_SPECIAL_M32R    (OPTION_SPECIAL_M32R + 1)
+#define OPTION_SPECIAL_FLOAT      (OPTION_NO_SPECIAL_M32R + 1)

 #define OPTION_WARN_UNMATCHED    (OPTION_SPECIAL_FLOAT + 1)
 #define OPTION_NO_WARN_UNMATCHED  (OPTION_WARN_UNMATCHED + 1)
   {"m32r",  no_argument, NULL, OPTION_M32R},
 #define OPTION_WARN_UNMATCHED    (OPTION_SPECIAL_FLOAT + 1)
 #define OPTION_NO_WARN_UNMATCHED  (OPTION_WARN_UNMATCHED + 1)
   {"m32r",  no_argument, NULL, OPTION_M32R},


@@ -238,6 +239,7 @@ struct option md_longopts[] =
   {"nIp", no_argument, NULL, OPTION_NO_IGNORE_PARALLEL},
   {"hidden", no_argument, NULL, OPTION_SPECIAL},
   {"bitinst", no_argument, NULL, OPTION_SPECIAL_M32R},
   {"nIp", no_argument, NULL, OPTION_NO_IGNORE_PARALLEL},
   {"hidden", no_argument, NULL, OPTION_SPECIAL},
   {"bitinst", no_argument, NULL, OPTION_SPECIAL_M32R},

+  {"no-bitinst", no_argument, NULL, OPTION_NO_SPECIAL_M32R},

   {"float", no_argument, NULL, OPTION_SPECIAL_FLOAT},
   /* Sigh.  I guess all warnings must now have both variants.  */
   {"warn-unmatched-high", no_argument, NULL, OPTION_WARN_UNMATCHED},
   {"float", no_argument, NULL, OPTION_SPECIAL_FLOAT},
   /* Sigh.  I guess all warnings must now have both variants.  */
   {"warn-unmatched-high", no_argument, NULL, OPTION_WARN_UNMATCHED},


@@ -353,6 +355,10 @@ md_parse_option (c, arg)
       enable_special_m32r = 1;
       break;
 
       enable_special_m32r = 1;
       break;
 

+    case OPTION_NO_SPECIAL_M32R:
+      enable_special_m32r = 0;
+      break;
+

     case OPTION_SPECIAL_FLOAT:
       enable_special_float = 1;
       break;
     case OPTION_SPECIAL_FLOAT:
       enable_special_float = 1;
       break;


@@ -410,6 +416,8 @@ md_show_usage (stream)
   fprintf (stream, _("\
   -no-parallel            disable -parallel\n"));
   fprintf (stream, _("\
   fprintf (stream, _("\
   -no-parallel            disable -parallel\n"));
   fprintf (stream, _("\

+  -no-bitinst             disallow the M32R2's extended bit-field instructions\n"));
+  fprintf (stream, _("\

   -O                      try to optimize code.  Implies -parallel\n"));
 
   fprintf (stream, _("\
   -O                      try to optimize code.  Implies -parallel\n"));
 
   fprintf (stream, _("\

diff --git a/gas/doc/c-m32r.texi b/gas/doc/c-m32r.texi
index 4360ee6156fdb81154a451145ef4d6f6b5c5edf7..52a73c38700da60e68316aca38bece1eb2f55bf2 100644 (file)
--- a/gas/doc/c-m32r.texi
+++ b/gas/doc/c-m32r.texi
@@ -1,4 +1,5 @@
-@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000, 2003
+@c Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000,
+@c 2003, 2004

 @c Free Software Foundation, Inc.
 @c This is part of the GAS manual.
 @c For copying conditions, see the file as.texinfo.
 @c Free Software Foundation, Inc.
 @c This is part of the GAS manual.
 @c For copying conditions, see the file as.texinfo.


@@ -91,6 +92,12 @@ do so.
 @cindex @code{-no-parallel} option, M32RX
 This option disables a previously enabled @emph{-parallel} option.
 
 @cindex @code{-no-parallel} option, M32RX
 This option disables a previously enabled @emph{-parallel} option.
 

+@item -no-bitinst
+@cindex @samp{-no-bitinst}, M32R2
+This option disables the support for the extended bit-field
+instructions provided by the M32R2.  If this support needs to be
+re-enabled the @emph{-bitinst} switch can be used to restore it.
+

 @item -O
 @cindex @code{-O} option, M32RX
 This option tells the assembler to attempt to optimize the
 @item -O
 @cindex @code{-O} option, M32RX
 This option tells the assembler to attempt to optimize the