+EXPORT_SYMBOL(snd_akm4xxx_write);
+
+/* reset procedure for AK4524 and AK4528 */
+static void ak4524_reset(struct snd_akm4xxx *ak, int state)
+{
+ unsigned int chip;
+ unsigned char reg, maxreg;
+
+ if (ak->type == SND_AK4528)
+ maxreg = 0x06;
+ else
+ maxreg = 0x08;
+ for (chip = 0; chip < ak->num_dacs/2; chip++) {
+ snd_akm4xxx_write(ak, chip, 0x01, state ? 0x00 : 0x03);
+ if (state)
+ continue;
+ /* DAC volumes */
+ for (reg = 0x04; reg < maxreg; reg++)
+ snd_akm4xxx_write(ak, chip, reg,
+ snd_akm4xxx_get(ak, chip, reg));
+ if (ak->type == SND_AK4528)
+ continue;
+ /* IPGA */
+ for (reg = 0x04; reg < 0x06; reg++)
+ snd_akm4xxx_write(ak, chip, reg,
+ snd_akm4xxx_get_ipga(ak, chip, reg));
+ }
+}
+
+/* reset procedure for AK4355 and AK4358 */
+static void ak4355_reset(struct snd_akm4xxx *ak, int state)
+{
+ unsigned char reg;
+
+ if (state) {
+ snd_akm4xxx_write(ak, 0, 0x01, 0x02); /* reset and soft-mute */
+ return;
+ }
+ for (reg = 0x00; reg < 0x0b; reg++)
+ if (reg != 0x01)
+ snd_akm4xxx_write(ak, 0, reg,
+ snd_akm4xxx_get(ak, 0, reg));
+ snd_akm4xxx_write(ak, 0, 0x01, 0x01); /* un-reset, unmute */
+}
+
+/* reset procedure for AK4381 */
+static void ak4381_reset(struct snd_akm4xxx *ak, int state)
+{
+ unsigned int chip;
+ unsigned char reg;
+
+ for (chip = 0; chip < ak->num_dacs/2; chip++) {
+ snd_akm4xxx_write(ak, chip, 0x00, state ? 0x0c : 0x0f);
+ if (state)
+ continue;
+ for (reg = 0x01; reg < 0x05; reg++)
+ snd_akm4xxx_write(ak, chip, reg,
+ snd_akm4xxx_get(ak, chip, reg));
+ }
+}
+