ARM: socfpga: dts: fix s2f_* clock name

The s2f_* clocks are called h2f_* in the datasheets.
Rename them accordingly in the socfpga.dtsi.

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 0207a6af5fd2ee29729b6cf64a00b815717ef2df..6d09b8d42fdd123da5e3b5e4b315983c42f9c6eb 100644 (file)
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -147,7 +147,7 @@
                                                        reg = <0x58>;
                                                };
 
-                                               cfg_s2f_usr0_clk: cfg_s2f_usr0_clk {
+                                               cfg_h2f_usr0_clk: cfg_h2f_usr0_clk {
                                                        #clock-cells = <0>;
                                                        compatible = "altr,socfpga-perip-clk";
                                                        clocks = <&main_pll>;
@@ -198,7 +198,7 @@
                                                        reg = <0x98>;
                                                };
 
-                                               s2f_usr1_clk: s2f_usr1_clk {
+                                               h2f_usr1_clk: h2f_usr1_clk {
                                                        #clock-cells = <0>;
                                                        compatible = "altr,socfpga-perip-clk";
                                                        clocks = <&periph_pll>;
@@ -235,7 +235,7 @@
                                                        reg = <0xD0>;
                                                };
 
-                                               s2f_usr2_clk: s2f_usr2_clk {
+                                               h2f_usr2_clk: h2f_usr2_clk {
                                                        #clock-cells = <0>;
                                                        compatible = "altr,socfpga-perip-clk";
                                                        clocks = <&sdram_pll>;
@@ -335,14 +335,14 @@
                                        cfg_clk: cfg_clk {
                                                #clock-cells = <0>;
                                                compatible = "altr,socfpga-gate-clk";
-                                               clocks = <&cfg_s2f_usr0_clk>;
+                                               clocks = <&cfg_h2f_usr0_clk>;
                                                clk-gate = <0x60 8>;
                                        };
 
-                                       s2f_user0_clk: s2f_user0_clk {
+                                       h2f_user0_clk: h2f_user0_clk {
                                                #clock-cells = <0>;
                                                compatible = "altr,socfpga-gate-clk";
-                                               clocks = <&cfg_s2f_usr0_clk>;
+                                               clocks = <&cfg_h2f_usr0_clk>;
                                                clk-gate = <0x60 9>;
                                        };
 
@@ -400,10 +400,10 @@
                                                div-reg = <0xa8 0 24>;
                                        };
 
-                                       s2f_user1_clk: s2f_user1_clk {
+                                       h2f_user1_clk: h2f_user1_clk {
                                                #clock-cells = <0>;
                                                compatible = "altr,socfpga-gate-clk";
-                                               clocks = <&s2f_usr1_clk>;
+                                               clocks = <&h2f_usr1_clk>;
                                                clk-gate = <0xa0 7>;
                                        };