ARM: tegra: update DT files to add DMA properties
authorStephen Warren <swarren@nvidia.com>
Mon, 11 Nov 2013 20:05:59 +0000 (13:05 -0700)
committerStephen Warren <swarren@nvidia.com>
Wed, 11 Dec 2013 23:42:38 +0000 (16:42 -0700)
This patch switches the Tegra DT files to use the standard DMA DT bindings
rather than custom properties. Note that the legacy properties are not yet
removed; the drivers must be updated to use the new properties first.

Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
arch/arm/boot/dts/tegra114.dtsi
arch/arm/boot/dts/tegra20.dtsi
arch/arm/boot/dts/tegra30.dtsi

index c40dbdcb37416f93cf77d34ebadf815df3d6310a..b4f2e62909a7ad410ea793985549ab3d7e40c345 100644 (file)
@@ -84,6 +84,7 @@
                clocks = <&tegra_car TEGRA114_CLK_APBDMA>;
                resets = <&tegra_car 34>;
                reset-names = "dma";
+               #dma-cells = <1>;
        };
 
        ahb: ahb {
                clocks = <&tegra_car TEGRA114_CLK_UARTA>;
                resets = <&tegra_car 6>;
                reset-names = "serial";
+               dmas = <&apbdma 8>, <&apbdma 8>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA114_CLK_UARTB>;
                resets = <&tegra_car 7>;
                reset-names = "serial";
+               dmas = <&apbdma 9>, <&apbdma 9>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA114_CLK_UARTC>;
                resets = <&tegra_car 55>;
                reset-names = "serial";
+               dmas = <&apbdma 10>, <&apbdma 10>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA114_CLK_UARTD>;
                resets = <&tegra_car 65>;
                reset-names = "serial";
+               dmas = <&apbdma 19>, <&apbdma 19>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clock-names = "div-clk";
                resets = <&tegra_car 12>;
                reset-names = "i2c";
+               dmas = <&apbdma 21>, <&apbdma 21>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clock-names = "div-clk";
                resets = <&tegra_car 54>;
                reset-names = "i2c";
+               dmas = <&apbdma 22>, <&apbdma 22>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clock-names = "div-clk";
                resets = <&tegra_car 67>;
                reset-names = "i2c";
+               dmas = <&apbdma 23>, <&apbdma 23>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clock-names = "div-clk";
                resets = <&tegra_car 103>;
                reset-names = "i2c";
+               dmas = <&apbdma 26>, <&apbdma 26>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clock-names = "div-clk";
                resets = <&tegra_car 47>;
                reset-names = "i2c";
+               dmas = <&apbdma 24>, <&apbdma 24>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clock-names = "spi";
                resets = <&tegra_car 41>;
                reset-names = "spi";
+               dmas = <&apbdma 15>, <&apbdma 15>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clock-names = "spi";
                resets = <&tegra_car 44>;
                reset-names = "spi";
+               dmas = <&apbdma 16>, <&apbdma 16>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clock-names = "spi";
                resets = <&tegra_car 46>;
                reset-names = "spi";
+               dmas = <&apbdma 17>, <&apbdma 17>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clock-names = "spi";
                resets = <&tegra_car 68>;
                reset-names = "spi";
+               dmas = <&apbdma 18>, <&apbdma 18>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clock-names = "spi";
                resets = <&tegra_car 104>;
                reset-names = "spi";
+               dmas = <&apbdma 27>, <&apbdma 27>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clock-names = "spi";
                resets = <&tegra_car 105>;
                reset-names = "spi";
+               dmas = <&apbdma 28>, <&apbdma 28>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
                              "i2s3", "i2s4", "dam0", "dam1", "dam2",
                              "spdif", "amx", "adx";
+               dmas = <&apbdma 1>, <&apbdma 1>,
+                      <&apbdma 2>, <&apbdma 2>,
+                      <&apbdma 3>, <&apbdma 3>,
+                      <&apbdma 4>, <&apbdma 4>,
+                      <&apbdma 6>, <&apbdma 6>,
+                      <&apbdma 7>, <&apbdma 7>,
+                      <&apbdma 12>, <&apbdma 12>,
+                      <&apbdma 13>, <&apbdma 13>,
+                      <&apbdma 14>, <&apbdma 14>,
+                      <&apbdma 29>, <&apbdma 29>;
+               dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2",
+                           "rx3", "tx3", "rx4", "tx4", "rx5", "tx5",
+                           "rx6", "tx6", "rx7", "tx7", "rx8", "tx8",
+                           "rx9", "tx9";
                ranges;
                #address-cells = <1>;
                #size-cells = <1>;
index f21b0416c547d33c7b22ef57ea18c653a23c6693..437793067ad303c2abbff811d265e396340a88a5 100644 (file)
                clocks = <&tegra_car TEGRA20_CLK_APBDMA>;
                resets = <&tegra_car 34>;
                reset-names = "dma";
+               #dma-cells = <1>;
        };
 
        ahb {
                clocks = <&tegra_car TEGRA20_CLK_AC97>;
                resets = <&tegra_car 3>;
                reset-names = "ac97";
+               dmas = <&apbdma 12>, <&apbdma 12>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA20_CLK_I2S1>;
                resets = <&tegra_car 11>;
                reset-names = "i2s";
+               dmas = <&apbdma 2>, <&apbdma 2>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA20_CLK_I2S2>;
                resets = <&tegra_car 18>;
                reset-names = "i2s";
+               dmas = <&apbdma 1>, <&apbdma 1>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA20_CLK_UARTA>;
                resets = <&tegra_car 6>;
                reset-names = "serial";
+               dmas = <&apbdma 8>, <&apbdma 8>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA20_CLK_UARTB>;
                resets = <&tegra_car 7>;
                reset-names = "serial";
+               dmas = <&apbdma 9>, <&apbdma 9>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA20_CLK_UARTC>;
                resets = <&tegra_car 55>;
                reset-names = "serial";
+               dmas = <&apbdma 10>, <&apbdma 10>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA20_CLK_UARTD>;
                resets = <&tegra_car 65>;
                reset-names = "serial";
+               dmas = <&apbdma 19>, <&apbdma 19>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA20_CLK_UARTE>;
                resets = <&tegra_car 66>;
                reset-names = "serial";
+               dmas = <&apbdma 20>, <&apbdma 20>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clock-names = "div-clk", "fast-clk";
                resets = <&tegra_car 12>;
                reset-names = "i2c";
+               dmas = <&apbdma 21>, <&apbdma 21>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA20_CLK_SPI>;
                resets = <&tegra_car 43>;
                reset-names = "spi";
+               dmas = <&apbdma 11>, <&apbdma 11>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clock-names = "div-clk", "fast-clk";
                resets = <&tegra_car 54>;
                reset-names = "i2c";
+               dmas = <&apbdma 22>, <&apbdma 22>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clock-names = "div-clk", "fast-clk";
                resets = <&tegra_car 67>;
                reset-names = "i2c";
+               dmas = <&apbdma 23>, <&apbdma 23>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clock-names = "div-clk", "fast-clk";
                resets = <&tegra_car 47>;
                reset-names = "i2c";
+               dmas = <&apbdma 24>, <&apbdma 24>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA20_CLK_SBC1>;
                resets = <&tegra_car 41>;
                reset-names = "spi";
+               dmas = <&apbdma 15>, <&apbdma 15>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA20_CLK_SBC2>;
                resets = <&tegra_car 44>;
                reset-names = "spi";
+               dmas = <&apbdma 16>, <&apbdma 16>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA20_CLK_SBC3>;
                resets = <&tegra_car 46>;
                reset-names = "spi";
+               dmas = <&apbdma 17>, <&apbdma 17>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA20_CLK_SBC4>;
                resets = <&tegra_car 68>;
                reset-names = "spi";
+               dmas = <&apbdma 18>, <&apbdma 18>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
index 1e1a0171c87c34e6f0b59a9b2a966a411fd9fc81..bf2602b87a79c5643ca68bd1857f75d141d569cc 100644 (file)
                clocks = <&tegra_car TEGRA30_CLK_APBDMA>;
                resets = <&tegra_car 34>;
                reset-names = "dma";
+               #dma-cells = <1>;
        };
 
        ahb: ahb {
                clocks = <&tegra_car TEGRA30_CLK_UARTA>;
                resets = <&tegra_car 6>;
                reset-names = "serial";
+               dmas = <&apbdma 8>, <&apbdma 8>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA30_CLK_UARTB>;
                resets = <&tegra_car 7>;
                reset-names = "serial";
+               dmas = <&apbdma 9>, <&apbdma 9>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA30_CLK_UARTC>;
                resets = <&tegra_car 55>;
                reset-names = "serial";
+               dmas = <&apbdma 10>, <&apbdma 10>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA30_CLK_UARTD>;
                resets = <&tegra_car 65>;
                reset-names = "serial";
+               dmas = <&apbdma 19>, <&apbdma 19>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA30_CLK_UARTE>;
                resets = <&tegra_car 66>;
                reset-names = "serial";
+               dmas = <&apbdma 20>, <&apbdma 20>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clock-names = "div-clk", "fast-clk";
                resets = <&tegra_car 12>;
                reset-names = "i2c";
+               dmas = <&apbdma 21>, <&apbdma 21>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clock-names = "div-clk", "fast-clk";
                resets = <&tegra_car 54>;
                reset-names = "i2c";
+               dmas = <&apbdma 22>, <&apbdma 22>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clock-names = "div-clk", "fast-clk";
                resets = <&tegra_car 67>;
                reset-names = "i2c";
+               dmas = <&apbdma 23>, <&apbdma 23>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                resets = <&tegra_car 103>;
                reset-names = "i2c";
                clock-names = "div-clk", "fast-clk";
+               dmas = <&apbdma 26>, <&apbdma 26>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clock-names = "div-clk", "fast-clk";
                resets = <&tegra_car 47>;
                reset-names = "i2c";
+               dmas = <&apbdma 24>, <&apbdma 24>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA30_CLK_SBC1>;
                resets = <&tegra_car 41>;
                reset-names = "spi";
+               dmas = <&apbdma 15>, <&apbdma 15>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA30_CLK_SBC2>;
                resets = <&tegra_car 44>;
                reset-names = "spi";
+               dmas = <&apbdma 16>, <&apbdma 16>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA30_CLK_SBC3>;
                resets = <&tegra_car 46>;
                reset-names = "spi";
+               dmas = <&apbdma 17>, <&apbdma 17>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA30_CLK_SBC4>;
                resets = <&tegra_car 68>;
                reset-names = "spi";
+               dmas = <&apbdma 18>, <&apbdma 18>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA30_CLK_SBC5>;
                resets = <&tegra_car 104>;
                reset-names = "spi";
+               dmas = <&apbdma 27>, <&apbdma 27>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                clocks = <&tegra_car TEGRA30_CLK_SBC6>;
                resets = <&tegra_car 106>;
                reset-names = "spi";
+               dmas = <&apbdma 28>, <&apbdma 28>;
+               dma-names = "rx", "tx";
                status = "disabled";
        };
 
                reset-names = "d_audio", "apbif", "i2s0", "i2s1", "i2s2",
                              "i2s3", "i2s4", "dam0", "dam1", "dam2",
                              "spdif";
+               dmas = <&apbdma 1>, <&apbdma 1>,
+                      <&apbdma 2>, <&apbdma 2>,
+                      <&apbdma 3>, <&apbdma 3>,
+                      <&apbdma 4>, <&apbdma 4>;
+               dma-names = "rx0", "tx0", "rx1", "tx1", "rx2", "tx2",
+                           "rx3", "tx3";
                ranges;
                #address-cells = <1>;
                #size-cells = <1>;
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