2002-03-02 Chris Demetriou <cgd@broadcom.com>

	* interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
	* mips.igen (LL, CxC1, MxC1): Likewise.

diff --git a/sim/mips/ChangeLog b/sim/mips/ChangeLog
index 43b78c3ec15d15081b4a1d99511515b800ddfabf..c02a53bbadf4b8a3ac6c6d02b9afd76376a69427 100644 (file)
--- a/sim/mips/ChangeLog
+++ b/sim/mips/ChangeLog
@@ -1,3 +1,8 @@
+2002-03-02  Chris Demetriou  <cgd@broadcom.com>
+
+       * interp.c (load_word): Use EXTEND32 rather than SIGNEXTEND.
+       * mips.igen (LL, CxC1, MxC1): Likewise.
+
 2002-03-02  Chris Demetriou  <cgd@broadcom.com>
 
        * mips.igen (LL, LLD, PREF, SC, SCD, ABS.fmt, ADD.fmt, CEIL.L.fmt,

diff --git a/sim/mips/interp.c b/sim/mips/interp.c
index 95f0ab63f5b8473f5f1294d052d4a9cf279e8a23..3e31ce46a71abf59189431db4f79839b7b5f37a1 100644 (file)
--- a/sim/mips/interp.c
+++ b/sim/mips/interp.c
@@ -1426,7 +1426,7 @@ load_word (SIM_DESC sd,
          LoadMemory (&memval,NULL,uncached, AccessLength_WORD, paddr, vaddr,
                               isDATA, isREAL);
          byte = (vaddr & mask) ^ (bigend << 2);
-         return SIGNEXTEND (((memval >> (8 * byte)) & 0xffffffff), 32);
+         return EXTEND32 (memval >> (8 * byte));
        }
     }
 

diff --git a/sim/mips/mips.igen b/sim/mips/mips.igen
index 1e6eb62d75422f07b53a6150adabde9f65641f6f..be7882064b629690f5a55965d9a5091523ea8d6a 100644 (file)
--- a/sim/mips/mips.igen
+++ b/sim/mips/mips.igen
@@ -1716,7 +1716,7 @@
            paddr = ((paddr & ~mask) | ((paddr & mask) ^ (reverse << shift)));
            LoadMemory(&memval,&memval1,uncached,AccessLength_WORD,paddr,vaddr,isDATA,isREAL);
            byte = ((vaddr & mask) ^ (bigend << shift));
-           GPR[RT] = (SIGNEXTEND(((memval >> (8 * byte)) & 0xFFFFFFFF),32));
+           GPR[RT] = EXTEND32 (memval >> (8 * byte));
            LLBIT = 1;
          }
       }
@@ -3269,9 +3269,9 @@
   else
     { /* control from */
       if (FS == 0)
-       PENDING_FILL(RT,SIGNEXTEND(FCR0,32));
+       PENDING_FILL(RT, EXTEND32 (FCR0));
       else if (FS == 31)
-       PENDING_FILL(RT,SIGNEXTEND(FCR31,32));
+       PENDING_FILL(RT, EXTEND32 (FCR31));
       /* else NOP */
     }
 }
@@ -3310,12 +3310,12 @@
       if (FS == 0)
        {
          TRACE_ALU_INPUT1 (FCR0);
-         GPR[RT] = SIGNEXTEND (FCR0, 32);
+         GPR[RT] = EXTEND32 (FCR0);
        }
       else if (FS == 31)
        {
          TRACE_ALU_INPUT1 (FCR31);
-         GPR[RT] = SIGNEXTEND (FCR31, 32);
+         GPR[RT] = EXTEND32 (FCR31);
        }
       TRACE_ALU_RESULT (GPR[RT]);
       /* else NOP */
@@ -3656,7 +3656,7 @@
        PENDING_FILL ((FS + FGRIDX), VL4_8(GPR[RT]));
     }
   else /*MFC1*/
-    PENDING_FILL (RT, SIGNEXTEND(FGR[FS],32));
+    PENDING_FILL (RT, EXTEND32 (FGR[FS]));
 }
 010001,00,X,00,5.RT,5.FS,00000000000:COP1Sb:32,f::MxC1
 "m%s<X>c1 r<RT>, f<FS>"
@@ -3672,7 +3672,7 @@
     /*MTC1*/
     StoreFPR (FS, fmt_uninterpreted_32, VL4_8 (GPR[RT]));
   else /*MFC1*/
-    GPR[RT] = SIGNEXTEND(FGR[FS],32);
+    GPR[RT] = EXTEND32 (FGR[FS]);
 }