Documentation: devicetree: fix spelling in pxa3xx-nand binding
authorBrian Norris <computersforpeace@gmail.com>
Sat, 28 Feb 2015 09:25:17 +0000 (01:25 -0800)
committerBrian Norris <computersforpeace@gmail.com>
Tue, 24 Mar 2015 21:21:26 +0000 (14:21 -0700)
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Documentation/devicetree/bindings/mtd/pxa3xx-nand.txt

index de8b517a5521914c6c37df4dc6d250abf2ffb742..4f833e3c4f516e90747865fefb7de633e240f6c3 100644 (file)
@@ -14,7 +14,7 @@ Optional properties:
  - marvell,nand-enable-arbiter:        Set to enable the bus arbiter
  - marvell,nand-keep-config:   Set to keep the NAND controller config as set
                                by the bootloader
- - num-cs:                     Number of chipselect lines to usw
+ - num-cs:                     Number of chipselect lines to use
  - nand-on-flash-bbt:          boolean to enable on flash bbt option if
                                not present false
  - nand-ecc-strength:           number of bits to correct per ECC step
This page took 0.025271 seconds and 5 git commands to generate.