ARM: socfpga: dts: Move common nodes to cyclone5 dtsi

The current socfpga_cyclone5.dts describes the Altera Cyclone5 SoC Development
Kit. The Cyclone5 includes a SoCFPGA, which itself can be included in other
SoC+FPGA combinations.

Instead of having to describe all Cyclone5 common nodes in every board specific
dts, move socfpga_cyclone5.dts to a dtsi and include this in a new dts for the
Development Kit.

[Dinh Nguyen] - Changed to 115200 for baudrate in dts bootargs

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index e95af3f5433bfc9a219818d928c511a964b9a247..430ba19b2f8722c76297d36c7b691d9a77db40fa 100644 (file)
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -211,7 +211,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE) += emev2-kzm9d.dtb \
        r8a73a4-ape6evm-reference.dtb \
        sh7372-mackerel.dtb
 dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d-reference.dtb
-dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5.dtb \
+dtb-$(CONFIG_ARCH_SOCFPGA) += socfpga_cyclone5_socdk.dtb \
        socfpga_vt.dtb
 dtb-$(CONFIG_ARCH_SPEAR13XX) += spear1310-evb.dtb \
        spear1340-evb.dtb

diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dts b/arch/arm/boot/dts/socfpga_cyclone5.dts
deleted file mode 100644 (file)
index 973999d..0000000
--- a/arch/arm/boot/dts/socfpga_cyclone5.dts
+++ /dev/null
@@ -1,85 +0,0 @@
-/*
- *  Copyright (C) 2012 Altera Corporation <www.altera.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program.  If not, see <http://www.gnu.org/licenses/>.
- */
-
-/dts-v1/;
-/include/ "socfpga.dtsi"
-
-/ {
-       model = "Altera SOCFPGA Cyclone V";
-       compatible = "altr,socfpga-cyclone5", "altr,socfpga";
-
-       chosen {
-               bootargs = "console=ttyS0,57600";
-       };
-
-       memory {
-               name = "memory";
-               device_type = "memory";
-               reg = <0x0 0x40000000>; /* 1GB */
-       };
-
-       aliases {
-               /* this allow the ethaddr uboot environmnet variable contents
-                * to be added to the gmac1 device tree blob.
-                */
-               ethernet0 = &gmac1;
-       };
-
-       soc {
-               clkmgr@ffd04000 {
-                       clocks {
-                               osc1 {
-                                       clock-frequency = <25000000>;
-                               };
-                       };
-               };
-
-               ethernet@ff702000 {
-                       phy-mode = "rgmii";
-                       phy-addr = <0xffffffff>; /* probe for phy addr */
-                       status = "okay";
-               };
-
-               timer0@ffc08000 {
-                       clock-frequency = <100000000>;
-               };
-
-               timer1@ffc09000 {
-                       clock-frequency = <100000000>;
-               };
-
-               timer2@ffd00000 {
-                       clock-frequency = <25000000>;
-               };
-
-               timer3@ffd01000 {
-                       clock-frequency = <25000000>;
-               };
-
-               serial0@ffc02000 {
-                       clock-frequency = <100000000>;
-               };
-
-               serial1@ffc03000 {
-                       clock-frequency = <100000000>;
-               };
-
-               sysmgr@ffd08000 {
-                       cpu1-start-addr = <0xffd080c4>;
-               };
-       };
-};

diff --git a/arch/arm/boot/dts/socfpga_cyclone5.dtsi b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
new file mode 100644 (file)
index 0000000..a8716f6
--- /dev/null
+++ b/arch/arm/boot/dts/socfpga_cyclone5.dtsi
@@ -0,0 +1,65 @@
+/*
+ *  Copyright (C) 2012 Altera Corporation <www.altera.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/dts-v1/;
+/include/ "socfpga.dtsi"
+
+/ {
+       soc {
+               clkmgr@ffd04000 {
+                       clocks {
+                               osc1 {
+                                       clock-frequency = <25000000>;
+                               };
+                       };
+               };
+
+               ethernet@ff702000 {
+                       phy-mode = "rgmii";
+                       phy-addr = <0xffffffff>; /* probe for phy addr */
+                       status = "okay";
+               };
+
+               timer0@ffc08000 {
+                       clock-frequency = <100000000>;
+               };
+
+               timer1@ffc09000 {
+                       clock-frequency = <100000000>;
+               };
+
+               timer2@ffd00000 {
+                       clock-frequency = <25000000>;
+               };
+
+               timer3@ffd01000 {
+                       clock-frequency = <25000000>;
+               };
+
+               serial0@ffc02000 {
+                       clock-frequency = <100000000>;
+               };
+
+               serial1@ffc03000 {
+                       clock-frequency = <100000000>;
+               };
+
+               sysmgr@ffd08000 {
+                       cpu1-start-addr = <0xffd080c4>;
+               };
+       };
+};

diff --git a/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
new file mode 100644 (file)
index 0000000..2ee52ab
--- /dev/null
+++ b/arch/arm/boot/dts/socfpga_cyclone5_socdk.dts
@@ -0,0 +1,40 @@
+/*
+ *  Copyright (C) 2012 Altera Corporation <www.altera.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.  If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/include/ "socfpga_cyclone5.dtsi"
+
+/ {
+       model = "Altera SOCFPGA Cyclone V SoC Development Kit";
+       compatible = "altr,socfpga-cyclone5", "altr,socfpga";
+
+       chosen {
+               bootargs = "console=ttyS0,115200";
+       };
+
+       memory {
+               name = "memory";
+               device_type = "memory";
+               reg = <0x0 0x40000000>; /* 1GB */
+       };
+
+       aliases {
+               /* this allow the ethaddr uboot environmnet variable contents
+                * to be added to the gmac1 device tree blob.
+                */
+               ethernet0 = &gmac1;
+       };
+};