ARM: OMAP3: PM: Move IO Daisychain function to omap3 prm file
authorVishwanath BS <vishwanath.bs@ti.com>
Fri, 22 Jun 2012 14:40:02 +0000 (08:40 -0600)
committerPaul Walmsley <paul@pwsan.com>
Fri, 22 Jun 2012 14:40:02 +0000 (08:40 -0600)
Since IO Daisychain modifies only PRM registers, it makes sense to move
it to PRM File. Also changed the timeout value for IO chain enable to
100us and added a wait for status disable at the end.

Thanks to Nishanth Menon <nm@ti.com> for contributing a fix to the
timeout code waiting for WUCLKOUT to go high.

Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Cc: Nishanth Menon <nm@ti.com>
Reviewed-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: renamed omap3_trigger_io_chain() to better describe the
 end result and to match other PRM functions; removed
 omap3_disable_io_chain(); moved MAX_IOPAD_LATCH_TIME to prcm-common as it
 will also be used by the OMAP4 code; removed unnecessary barrier;
 added kerneldoc; added credit for fix from Nishanth]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
arch/arm/mach-omap2/pm34xx.c
arch/arm/mach-omap2/prcm-common.h
arch/arm/mach-omap2/prm2xxx_3xxx.c
arch/arm/mach-omap2/prm2xxx_3xxx.h

index 6d7f0d8a310365fffd67ed6f3b32c19d07de5e36..9d6cb7cc94ab3f7d436e9038bfd640d3d3e2c203 100644 (file)
@@ -72,34 +72,6 @@ static struct powerdomain *mpu_pwrdm, *neon_pwrdm;
 static struct powerdomain *core_pwrdm, *per_pwrdm;
 static struct powerdomain *cam_pwrdm;
 
-static void omap3_enable_io_chain(void)
-{
-       int timeout = 0;
-
-       omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
-                                  PM_WKEN);
-       /* Do a readback to assure write has been done */
-       omap2_prm_read_mod_reg(WKUP_MOD, PM_WKEN);
-
-       while (!(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKST) &
-                OMAP3430_ST_IO_CHAIN_MASK)) {
-               timeout++;
-               if (timeout > 1000) {
-                       pr_err("Wake up daisy chain activation failed.\n");
-                       return;
-               }
-       }
-       omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
-                                    PM_WKEN);
-
-}
-
-static void omap3_disable_io_chain(void)
-{
-       omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
-                                    PM_WKEN);
-}
-
 static void omap3_core_save_context(void)
 {
        omap3_ctrl_save_padconf();
@@ -305,7 +277,7 @@ void omap_sram_idle(void)
             core_next_state < PWRDM_POWER_ON)) {
                omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN);
                if (omap3_has_io_chain_ctrl())
-                       omap3_enable_io_chain();
+                       omap3xxx_prm_reconfigure_io_chain();
        }
 
        pwrdm_pre_transition();
@@ -382,12 +354,9 @@ void omap_sram_idle(void)
        /* Disable IO-PAD and IO-CHAIN wakeup */
        if (omap3_has_io_wakeup() &&
            (per_next_state < PWRDM_POWER_ON ||
-            core_next_state < PWRDM_POWER_ON)) {
+            core_next_state < PWRDM_POWER_ON))
                omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD,
                                             PM_WKEN);
-               if (omap3_has_io_chain_ctrl())
-                       omap3_disable_io_chain();
-       }
 
        clkdm_allow_idle(mpu_pwrdm->pwrdm_clkdms[0]);
 }
index 6da3ba483ad118ea0b0e8082fa9e5e3417635465..fca23cbea708798a1adca967041cbfe1d51b2d3a 100644 (file)
  */
 #define MAX_MODULE_HARDRESET_WAIT              10000
 
+/*
+ * Maximum time(us) it takes to output the signal WUCLKOUT of the last
+ * pad of the I/O ring after asserting WUCLKIN high.  Tero measured
+ * the actual time at 7 to 8 microseconds on OMAP3 and 2 to 4
+ * microseconds on OMAP4, so this timeout may be too high.
+ */
+#define MAX_IOPAD_LATCH_TIME                   100
+
 # ifndef __ASSEMBLER__
 extern void __iomem *prm_base;
 extern void __iomem *cm_base;
index 9ce765407ad55d5ac9190af77cdb48338c338752..7d62bd654dbeac9a596a9f7a366e742d95fc7385 100644 (file)
@@ -301,6 +301,37 @@ void omap3xxx_prm_restore_irqen(u32 *saved_mask)
                                OMAP3_PRM_IRQENABLE_MPU_OFFSET);
 }
 
+/**
+ * omap3xxx_prm_reconfigure_io_chain - clear latches and reconfigure I/O chain
+ *
+ * Clear any previously-latched I/O wakeup events and ensure that the
+ * I/O wakeup gates are aligned with the current mux settings.  Works
+ * by asserting WUCLKIN, waiting for WUCLKOUT to be asserted, and then
+ * deasserting WUCLKIN and clearing the ST_IO_CHAIN WKST bit.  No
+ * return value.
+ */
+void omap3xxx_prm_reconfigure_io_chain(void)
+{
+       int i = 0;
+
+       omap2_prm_set_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
+                                  PM_WKEN);
+
+       omap_test_timeout(omap2_prm_read_mod_reg(WKUP_MOD, PM_WKST) &
+                         OMAP3430_ST_IO_CHAIN_MASK,
+                         MAX_IOPAD_LATCH_TIME, i);
+       if (i == MAX_IOPAD_LATCH_TIME)
+               pr_warn("PRM: I/O chain clock line assertion timed out\n");
+
+       omap2_prm_clear_mod_reg_bits(OMAP3430_EN_IO_CHAIN_MASK, WKUP_MOD,
+                                    PM_WKEN);
+
+       omap2_prm_set_mod_reg_bits(OMAP3430_ST_IO_CHAIN_MASK, WKUP_MOD,
+                                  PM_WKST);
+
+       omap2_prm_read_mod_reg(WKUP_MOD, PM_WKST);
+}
+
 static int __init omap3xxx_prcm_init(void)
 {
        if (cpu_is_omap34xx())
index 491c72dd20a06037461e4f34469d463428f65f6d..a8c946f318ab798b5abeb79dbe9c3349324f8b17 100644 (file)
@@ -317,6 +317,8 @@ extern u32 omap3_prm_vcvp_read(u8 offset);
 extern void omap3_prm_vcvp_write(u32 val, u8 offset);
 extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset);
 
+extern void omap3xxx_prm_reconfigure_io_chain(void);
+
 /* PRM interrupt-related functions */
 extern void omap3xxx_prm_read_pending_irqs(unsigned long *events);
 extern void omap3xxx_prm_ocp_barrier(void);
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