RISC-V: Fix relocation failure with zero address sections.
authorJim Wilson <jimw@sifive.com>
Thu, 15 Feb 2018 21:48:38 +0000 (13:48 -0800)
committerJim Wilson <jimw@sifive.com>
Thu, 15 Feb 2018 21:48:38 +0000 (13:48 -0800)
bfd/
* elfnn-riscv.c (_bfd_riscv_relax_section): Ifdef out check to ignore
symbols whose section address is zero.

bfd/ChangeLog
bfd/elfnn-riscv.c

index cab828b466e05372d0aeaf988a92f066599f69bc..b48afd67bfaf439b533381600d2eb2e0fb813e1d 100644 (file)
@@ -1,5 +1,8 @@
 2018-02-15  Jim Wilson  <jimw@sifive.com>
 
+       * elfnn-riscv.c (_bfd_riscv_relax_section): Ifdef out check to ignore
+       symbols whose section address is zero.
+
        * elfnn-riscv.c (riscv_elf_relocate_section): Use bfd_reloc_dangerous
        when pcrel_lo reloc has an addend.  Use reloc_dangerous callback for
        bfd_reloc_dangerous.  Use einfo instead of warning callback for errors.
index 931bd1d89d5cf74a2deb784805bc3b1469bb0cce..0530532eec360d0f0257dd88201393d5a549a462 100644 (file)
@@ -3399,8 +3399,14 @@ _bfd_riscv_relax_section (bfd *abfd, asection *sec,
            {
              BFD_ASSERT (isym->st_shndx < elf_numsections (abfd));
              sym_sec = elf_elfsections (abfd)[isym->st_shndx]->bfd_section;
+#if 0
+             /* The purpose of this code is unknown.  It breaks linker scripts
+                for embedded development that place sections at address zero.
+                This code is believed to be unnecessary.  Disabling it but not
+                yet removing it, in case something breaks.  */
              if (sec_addr (sym_sec) == 0)
                continue;
+#endif
              symval = sec_addr (sym_sec) + isym->st_value;
            }
        }
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