RISC-V: Make disassebler work for --enable-targets=all config.

	opcodes/
	* disassemble.c (ARCH_riscv): Define if ARCH_all.

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index b4b4cbb0c11534a489e48afef32381b55dcc10d8..325972faeb810c7e8174955783da04bb1213911a 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2018-02-22  Shea Levy <shea@shealevy.com>
+
+       * disassemble.c (ARCH_riscv): Define if ARCH_all.
+
 2018-02-22  H.J. Lu  <hongjiu.lu@intel.com>
 
        * i386-opc.tbl: Add {rex},

diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
index ae48f5367b09d0d7b0f9338d3d6fa87bb6b62bc0..78f09954630418bb0bd369804de09a6c1f6ac3d3 100644 (file)
--- a/opcodes/disassemble.c
+++ b/opcodes/disassemble.c
@@ -76,6 +76,7 @@
 #define ARCH_pj
 #define ARCH_powerpc
 #define ARCH_pru
+#define ARCH_riscv
 #define ARCH_rs6000
 #define ARCH_rl78
 #define ARCH_rx