clk: tegra: Fix cdev1 and cdev2 IDs
authorPrashant Gaikwad <pgaikwad@nvidia.com>
Thu, 4 Apr 2013 09:05:04 +0000 (14:35 +0530)
committerStephen Warren <swarren@nvidia.com>
Thu, 4 Apr 2013 23:17:44 +0000 (17:17 -0600)
Correct IDs for cdev1 and cdev2 are 94 and 93 respectively.

Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com>
[swarren: split into separate driver and device-tree patches]
Signed-off-by: Stephen Warren <swarren@nvidia.com>
arch/arm/boot/dts/tegra20-colibri-512.dtsi
arch/arm/boot/dts/tegra20-harmony.dts
arch/arm/boot/dts/tegra20-medcom-wide.dts
arch/arm/boot/dts/tegra20-paz00.dts
arch/arm/boot/dts/tegra20-plutux.dts
arch/arm/boot/dts/tegra20-seaboard.dts
arch/arm/boot/dts/tegra20-tec.dts
arch/arm/boot/dts/tegra20-trimslice.dts
arch/arm/boot/dts/tegra20-ventana.dts
arch/arm/boot/dts/tegra20-whistler.dts
arch/arm/boot/dts/tegra20.dtsi

index a094787aca22a4b0e08b1cadc43470db260b29b8..a573b94b7c93eafb313e42bf8dfde31e9ecfcd6a 100644 (file)
 
                nvidia,ac97-controller = <&ac97>;
 
-               clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+               clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
                clock-names = "pll_a", "pll_a_out0", "mclk";
        };
 
index a44b54eb60378acaf34f5931c07fca78ded68158..e7d5de4e00b99e57628298cd5c3d4c3fb4fb67fd 100644 (file)
                nvidia,int-mic-en-gpios = <&gpio 184 0>; /*gpio PX0 */
                nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
 
-               clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+               clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
                clock-names = "pll_a", "pll_a_out0", "mclk";
        };
 };
index 740ba7c424d486142affaf0bf66d6132c1d2e998..ace23437da8902ec212df6124ec80d05c5bd7d72 100644 (file)
@@ -59,7 +59,7 @@
                nvidia,spkr-en-gpios = <&wm8903 2 0>;
                nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
 
-               clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+               clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
                clock-names = "pll_a", "pll_a_out0", "mclk";
        };
 };
index 8c0e9a2658105e2ba4963c698513f7baa1bc1185..e3e0c9977df451a778006bc71d75d3aec9022f93 100644 (file)
                nvidia,i2s-controller = <&tegra_i2s1>;
                nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
 
-               clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+               clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
                clock-names = "pll_a", "pll_a_out0", "mclk";
        };
 };
index 7085ae5f05626e2af5dd96fd68ecb07fd0fef0d1..1a17cc30bb9d47b002998d0fd2073e3d99aa95c2 100644 (file)
@@ -53,7 +53,7 @@
                nvidia,spkr-en-gpios = <&wm8903 2 0>;
                nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
 
-               clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+               clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
                clock-names = "pll_a", "pll_a_out0", "mclk";
        };
 };
index c45b69859748fe98ba11bef8e4f3ba2f23514374..cee4c34010fed6fa1d1ce96a1c45bebccf97a974 100644 (file)
                nvidia,spkr-en-gpios = <&wm8903 2 0>;
                nvidia,hp-det-gpios = <&gpio 185 0>; /* gpio PX1 */
 
-               clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+               clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
                clock-names = "pll_a", "pll_a_out0", "mclk";
        };
 };
index 9be175d383929418aedc738ebd9d0f386388978e..742f0b38d21df42524a2bc9c0ccd3d1fb60e0e7c 100644 (file)
@@ -53,7 +53,7 @@
                nvidia,spkr-en-gpios = <&wm8903 2 0>;
                nvidia,hp-det-gpios = <&gpio 178 0>; /* gpio PW2 */
 
-               clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+               clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
                clock-names = "pll_a", "pll_a_out0", "mclk";
        };
 };
index f2fbc3838d0d224dce44588a7e7194a4f6f1094d..9cc78a15d739860393edb0b227aba930444cb59f 100644 (file)
                nvidia,i2s-controller = <&tegra_i2s1>;
                nvidia,audio-codec = <&codec>;
 
-               clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+               clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
                clock-names = "pll_a", "pll_a_out0", "mclk";
        };
 };
index 395df485d558aa63e254c7372060c57e59289604..dd38f1f038347e6d328f1af6b0757d7fa03b9c36 100644 (file)
                nvidia,int-mic-en-gpios = <&gpio 184 0>; /* gpio PX0 */
                nvidia,ext-mic-en-gpios = <&gpio 185 0>; /* gpio PX1 */
 
-               clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+               clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
                clock-names = "pll_a", "pll_a_out0", "mclk";
        };
 };
index 2ed6bb8ce6f4725d8142407e224d8e7a6706d98d..d2567f83aaffd19584e45c8d080a560e74d1172d 100644 (file)
                nvidia,i2s-controller = <&tegra_i2s1>;
                nvidia,audio-codec = <&codec>;
 
-               clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 93>;
+               clocks = <&tegra_car 112>, <&tegra_car 113>, <&tegra_car 94>;
                clock-names = "pll_a", "pll_a_out0", "mclk";
        };
 };
index 1911432987ef1e5343dbf2b1ae268fb6f3b56355..3e676a26c9800890dd861132dc2bc823fa286d38 100644 (file)
                compatible = "nvidia,tegra20-usb-phy";
                reg = <0xc5004400 0x3c00>;
                phy_type = "ulpi";
-               clocks = <&tegra_car 94>, <&tegra_car 127>;
+               clocks = <&tegra_car 93>, <&tegra_car 127>;
                clock-names = "phy", "pll_u";
        };
 
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