mfd: Fix db5500-prcmu defines
authorLinus Walleij <linus.walleij@linaro.org>
Fri, 12 Aug 2011 08:29:10 +0000 (10:29 +0200)
committerSamuel Ortiz <sameo@linux.intel.com>
Mon, 24 Oct 2011 12:09:19 +0000 (14:09 +0200)
This fixes two erroneous defines for the PLLs and adds new
defines for the reset pin controls.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>
drivers/mfd/db5500-prcmu.c

index dc215878835acf427e1ff5f268ce1c35e24c2361..bb115b2f04e9b36949f35e53fb288899c5153a8b 100644 (file)
@@ -109,15 +109,18 @@ enum mb5_header {
 #define PRCMU_DSI_CLOCK_SETTING                        0x00000128
 /* TVCLK_MGT PLLSW=001 (PLLSOC0) PLLDIV=0x13, = 19.05 MHZ */
 #define PRCMU_DSI_LP_CLOCK_SETTING             0x00000135
-#define PRCMU_PLLDSI_FREQ_SETTING              0x0004013C
+#define PRCMU_PLLDSI_FREQ_SETTING              0x00020121
 #define PRCMU_DSI_PLLOUT_SEL_SETTING           0x00000002
-#define PRCMU_ENABLE_ESCAPE_CLOCK_DIV          0x03000101
+#define PRCMU_ENABLE_ESCAPE_CLOCK_DIV          0x03000201
 #define PRCMU_DISABLE_ESCAPE_CLOCK_DIV         0x00000101
 
 #define PRCMU_ENABLE_PLLDSI                    0x00000001
 #define PRCMU_DISABLE_PLLDSI                   0x00000000
 
 #define PRCMU_DSI_RESET_SW                     0x00000003
+#define PRCMU_RESOUTN0_PIN                     0x00000001
+#define PRCMU_RESOUTN1_PIN                     0x00000002
+#define PRCMU_RESOUTN2_PIN                     0x00000004
 
 #define PRCMU_PLLDSI_LOCKP_LOCKED              0x3
 
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