imx31: define and use MX31_IO_ADDRESS

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Daniel Mack <daniel@caiaq.de>
Cc: Greg Kroah-Hartman <gregkh@suse.de>
Cc: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cc: Magnus Lilja <lilja.magnus@gmail.com>

diff --git a/arch/arm/mach-mx3/clock-imx31.c b/arch/arm/mach-mx3/clock-imx31.c
index cc03a61116e2e08165faea6c9275b6afcd899850..d22a66f502a86a30c512f4c0a6d0190a8674e1d0 100644 (file)
--- a/arch/arm/mach-mx3/clock-imx31.c
+++ b/arch/arm/mach-mx3/clock-imx31.c
@@ -625,7 +625,8 @@ int __init mx31_clocks_init(unsigned long fref)
                __raw_writel(reg, MXC_CCM_PMCR1);
        }
 
-       mxc_timer_init(&ipg_clk, IO_ADDRESS(MX31_GPT1_BASE_ADDR), MX31_INT_GPT);
+       mxc_timer_init(&ipg_clk, MX31_IO_ADDRESS(MX31_GPT1_BASE_ADDR),
+                       MX31_INT_GPT);
 
        return 0;
 }

diff --git a/arch/arm/mach-mx3/crm_regs.h b/arch/arm/mach-mx3/crm_regs.h
index e25cd92dd427f42073bef432e4c071a9c66d87ab..37a8a07beda3ea3a3a6bd0c5949eadf5f6830c29 100644 (file)
--- a/arch/arm/mach-mx3/crm_regs.h
+++ b/arch/arm/mach-mx3/crm_regs.h
@@ -24,7 +24,7 @@
 #define CKIH_CLK_FREQ_27MHZ     27000000
 #define CKIL_CLK_FREQ           32768
 
-#define MXC_CCM_BASE           IO_ADDRESS(MX31_CCM_BASE_ADDR)
+#define MXC_CCM_BASE           MX31_IO_ADDRESS(MX31_CCM_BASE_ADDR)
 
 /* Register addresses */
 #define MXC_CCM_CCMR           (MXC_CCM_BASE + 0x00)

diff --git a/arch/arm/mach-mx3/iomux-imx31.c b/arch/arm/mach-mx3/iomux-imx31.c
index 6381e561961cc8a5e6906155dff14deddaa194cf..a1d7fa5123dcdc0bbf4370c06be4968b2dcaca39 100644 (file)
--- a/arch/arm/mach-mx3/iomux-imx31.c
+++ b/arch/arm/mach-mx3/iomux-imx31.c
@@ -29,7 +29,7 @@
 /*
  * IOMUX register (base) addresses
  */
-#define IOMUX_BASE     IO_ADDRESS(MX31_IOMUXC_BASE_ADDR)
+#define IOMUX_BASE     MX31_IO_ADDRESS(MX31_IOMUXC_BASE_ADDR)
 #define IOMUXINT_OBS1  (IOMUX_BASE + 0x000)
 #define IOMUXINT_OBS2  (IOMUX_BASE + 0x004)
 #define IOMUXGPR       (IOMUX_BASE + 0x008)

diff --git a/arch/arm/plat-mxc/ehci.c b/arch/arm/plat-mxc/ehci.c
index 41599be882e8dbb17d01172adff26bed43055e12..8df03f36295cd6ab1f81a89c8f7b20c2c14e667e 100644 (file)
--- a/arch/arm/plat-mxc/ehci.c
+++ b/arch/arm/plat-mxc/ehci.c
@@ -43,7 +43,7 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
        unsigned int v;
 
        if (cpu_is_mx31()) {
-               v = readl(IO_ADDRESS(MX31_OTG_BASE_ADDR +
+               v = readl(MX31_IO_ADDRESS(MX31_OTG_BASE_ADDR +
                                     USBCTRL_OTGBASE_OFFSET));
 
                switch (port) {
@@ -79,7 +79,7 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
                        break;
                }
 
-               writel(v, IO_ADDRESS(MX31_OTG_BASE_ADDR +
+               writel(v, MX31_IO_ADDRESS(MX31_OTG_BASE_ADDR +
                                     USBCTRL_OTGBASE_OFFSET));
                return 0;
        }

diff --git a/arch/arm/plat-mxc/include/mach/board-mx31ads.h b/arch/arm/plat-mxc/include/mach/board-mx31ads.h
index 2cbfa35e82ff628a27e785774633901ec3306f2c..095a199591c6ed23a05b3bee2358474391cc98a9 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/board-mx31ads.h
+++ b/arch/arm/plat-mxc/include/mach/board-mx31ads.h
@@ -14,7 +14,7 @@
 #include <mach/hardware.h>
 
 /* Base address of PBC controller */
-#define PBC_BASE_ADDRESS        IO_ADDRESS(CS4_BASE_ADDR)
+#define PBC_BASE_ADDRESS        MX31_CS4_BASE_ADDR_VIRT
 /* Offsets for the PBC Controller register */
 
 /* PBC Board status register offset */

diff --git a/arch/arm/plat-mxc/include/mach/mx31.h b/arch/arm/plat-mxc/include/mach/mx31.h
index b8b47d139eb562357ff315acc41b539e014368d5..0c005af2c8cf4dba8462cfafb4d38b3aec0e15a5 100644 (file)
--- a/arch/arm/plat-mxc/include/mach/mx31.h
+++ b/arch/arm/plat-mxc/include/mach/mx31.h
@@ -109,6 +109,13 @@
 
 #define MX31_PCMCIA_MEM_BASE_ADDR      0xbc000000
 
+#define MX31_IO_ADDRESS(x) (                                           \
+       IMX_IO_ADDRESS(x, MX31_AIPS1) ?:                                \
+       IMX_IO_ADDRESS(x, MX31_AIPS2) ?:                                \
+       IMX_IO_ADDRESS(x, MX31_AVIC) ?:                                 \
+       IMX_IO_ADDRESS(x, MX31_X_MEMC) ?:                               \
+       IMX_IO_ADDRESS(x, MX31_SPBA0))
+
 #define MX31_INT_I2C3          3
 #define MX31_INT_I2C2          4
 #define MX31_INT_MPEG4_ENCODER 5