dmaengine: sun6i: Fix the access of the IRQ register

The IRQ register number is computed, but this number was not used
and the register was the one indexed by the channel index instead.
Then, only the first DMA channel was working.

Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Jean-Francois Moine <moinejf@free.fr>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>

diff --git a/drivers/dma/sun6i-dma.c b/drivers/dma/sun6i-dma.c
index 2db12e493c530ccc369582b46d7943cd92eac31d..2ec320dc68b3df3f991c5a7f5e5eb6514ab9b203 100644 (file)
--- a/drivers/dma/sun6i-dma.c
+++ b/drivers/dma/sun6i-dma.c
@@ -381,9 +381,9 @@ static int sun6i_dma_start_desc(struct sun6i_vchan *vchan)
        irq_reg = pchan->idx / DMA_IRQ_CHAN_NR;
        irq_offset = pchan->idx % DMA_IRQ_CHAN_NR;
 
-       irq_val = readl(sdev->base + DMA_IRQ_EN(irq_offset));
+       irq_val = readl(sdev->base + DMA_IRQ_EN(irq_reg));
        irq_val |= DMA_IRQ_QUEUE << (irq_offset * DMA_IRQ_CHAN_WIDTH);
-       writel(irq_val, sdev->base + DMA_IRQ_EN(irq_offset));
+       writel(irq_val, sdev->base + DMA_IRQ_EN(irq_reg));
 
        writel(pchan->desc->p_lli, pchan->base + DMA_CHAN_LLI_ADDR);
        writel(DMA_CHAN_ENABLE_START, pchan->base + DMA_CHAN_ENABLE);