ARM: dts: add rk3288 dwc2 controller support

rk3288 has two kind of usb controller, this add the dwc2 controller
for otg and host1.

Controller can works with usb PHY default setting and Vbus on.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 5f866e0837a835732dfefbf91848659b00b85473..2ac3488c47b4285f822fef9cbc3ba41560029a31 100644 (file)
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -256,6 +256,26 @@
 
        /* NOTE: ohci@ff520000 doesn't actually work on hardware */
 
+       usb_host1: usb@ff540000 {
+               compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
+                               "snps,dwc2";
+               reg = <0xff540000 0x40000>;
+               interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru HCLK_USBHOST1>;
+               clock-names = "otg";
+               status = "disabled";
+       };
+
+       usb_otg: usb@ff580000 {
+               compatible = "rockchip,rk3288-usb", "rockchip,rk3066-usb",
+                               "snps,dwc2";
+               reg = <0xff580000 0x40000>;
+               interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
+               clocks = <&cru HCLK_OTG0>;
+               clock-names = "otg";
+               status = "disabled";
+       };
+
        usb_hsic: usb@ff5c0000 {
                compatible = "generic-ehci";
                reg = <0xff5c0000 0x100>;